Datasheet

UCD9081

SLVS813B –JUNE 2008–REVISED DECEMBER 2010

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RESETTING THE FLASH ERROR LOG

The UCD9081 can be configured to log errors on a critical voltage rail to internal FLASH memory. This

mechanism permits the error log to be read after the device has been reset, or if a loss of power causes

non-volatile memory to be cleared. As outlined in the section on Error Logging , there are two modes for using

this feature.

The first mode holds the UCD9081 in RESET (following a RESET of the device) if entries are present in the

FLASH error log. This allows the user to successfully read and clear the FLASH error log before sequencing the

system. When using this mode, the UCD9081 will not sequence until the FLASH error log is cleared. To clear the

FLASH error log and sequence the device, perform the following steps:

• Write FLASHLOCK register to a value of 0x02

• Write WADDR register to a value of 0x1000

• Write WDATA register to a value of 0xBADC

• Write WADDR register to a value of 0x107E

• Write WDATA register to a value of 0xBADC

• Write FLASHLOCK register to a value of 0x00

• Write RESTART register to a value of 0x00

The second mode allows the UCD9081 to sequence (following a RESET of the device) regardless of whether or

not there are entries present in the FLASH error log. When using this mode, the user still may wish to clear the

FLASH error logs some time after RESET. To do this, perform the following steps:

• Write FLASHLOCK register to a value of 0x02

• Write WADDR register to a value of 0x1000

• Write WDATA register to a value of 0xBADC

• Write WADDR register to a value of 0x107E

• Write WDATA register to a value of 0xBADC

• Write FLASHLOCK register to a value of 0x00

Note that clearing the FLASH error log during run-time will cause a delay in monitoring.

Product Folder Link(s) :UCD9081