Datasheet

Address

07815

rw-0x00 rw-0x00

WADDR2

(0x31)

WADDR1

(0x30)

Data

07815

WDATA2

(0x33)

WDATA1

(0x32)

UCD9081

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SLVS813B –JUNE 2008–REVISED DECEMBER 2010

WADDR and WDATA

In order to update the configuration on the UCD9081, four registers are provided. WADDR2 (address 15:8) and

WADDR1 (address bits 7:0) specify the memory address. WDATA2 (data bits 15:8) and WDATA1 (data bits 7:0)

specify the data written to or read from that memory address.

The format for the WADDR register is as follows:

To set the memory address that will be accessed, write the LSB of the address to the WADDR1 register and the

MSB of the address to the WADDR2 register. For example, to write the address 0x1234 to the device, set

WADDR1 = 0x34 and WADDR2 = 0x12. Note that because these addresses support the auto-increment feature,

the user can perform a single 16-bit write to WADDR1 to write the entire address.

The format for the WDATA register is as follows:

To set the value of the data that will be written to the UCD9081, write the LSB of the data to the WDATA1

set WDATA1 = 0xEF and WDATA2 = 0xBE. Note that because these addresses support the auto-increment

feature, the user can perform a single 16-bit write to WDATA1 to write the entire data. To read the value of the

data at the specified address, read the LSB from WDATA1 and the MSB from WDATA2.

These registers are used for updating the UCD9081 configuration as explained in the Configuring the UDC9081

section.

READING THE FLASH ERROR LOG

There are two ways to read the FLASH error log in the UCD9081. While the device is in RESET and the

NVERRLOG bit in the STATUS register is set to a 1 (FLASH error logs present), the user may use the ERROR

registers to read the log. During run-time, the FLASH error log can be accessed by performing an I

C read

transaction starting at address 0x1000 with a length of 48 bytes.

Product Folder Link(s) :UCD9081