Datasheet
UCD9081
SLVS813B –JUNE 2008–REVISED DECEMBER 2010
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SEQUENCE AFTER SHUTDOWN
Sequence after shutdown is an option that can be used in conjunction with Retry n Times . When a fault occurs
on the configured rail, this option forces a UCD9081 RESET to occur after the procedure outlined in Retry n
Times takes place. Note that if a rail is configured for sequence after shutdown and is forced to shutdown due to
a fault on a parent rail, a sequence after shutdown will take place.
ERROR LOGGING
The UCD9081 is capable of logging errors in two ways. The first method uses an eight-deep FIFO located in
volatile memory (SRAM) of the UCD9081. Error conditions are posted to the ERROR registers according to the
configuration for that rail. The UCD9081 logs the type of error, the time (from Reset) when the error occurred, the
rail number, and the rail voltage. If the user has specified ignore glitches as an option for the faulty rail, glitches
will not be posted to the error log. If the user has specified Ignore as the alarm response for the faulty rail, no
errors will be posted to the error log for that rail. All other alarm responses will result in the error condition being
logged. Due to the unknown latency of the host extracting data from the FIFO, the UCD9081 only posts to the
FIFO is if it has room to write. There is no impact to the monitoring operation of the UCD9081 if this FIFO is full
and cannot be written.
The second method of error logging uses the non-volatile memory (FLASH) of the UCD9081. Similar to the error
log in SRAM, faults will be posted for all rails that have the appropriate alarm processing options selected. In this
case, errors will be posted to both the SRAM log and the FLASH log. The UCD9081 is capable of recording up to
eight entries in the flash error log. Again, the UCD9081 will only post to the log if there is room to write. There is
no impact to the monitoring operation of the UCD9081 if the error log is full and cannot be written.
In order to provide flexibility for a variety of systems, the UCD9081 has two modes for non-volatile error logging.
The first mode configures the UCD9081 to hold in RESET when entries are present in the FLASH error log. This
is advantageous in systems where a master I
2
C device is available to read the error log following a critical
system failure. When configured for this mode, the UCD9081 will check for a non-empty FLASH error log during
RESET. If there are entries in the FLASH error log, the device will wait for a host to clear the error log before
sequencing the device. For information on clearing the FLASH error log, see the section on Resetting the Flash
Error Log .
The second mode allows the UCD9081 to sequence (following a RESET of the device) regardless of whether or
not there are entries present in the FLASH error log. This is useful in systems with no master I
2
C device, or
where power cycles are common and not due to system failure.
For information on reading the error logs in each mode, see the section on Monitoring the UCD9081.
BROWNOUT
The brownout circuit is implemented to provide the proper internal reset signal to the device during power on and
power off.
CONFIGURING AND MONITORING THE UCD9081
The UCD9081 supports both configuration and monitoring using its I
2
C slave interface. A Microsoft™ Windows™
GUI is available for configuring and monitoring the UCD9081. This GUI can be downloaded from the TI website
at www.ti.com.
For monitoring the sequencer, an I
2
C memory map allows an I
2
C host to perform memory-mapped reads (and in
some cases writes) to obtain status information from the UCD9081. For instance, all rails can report their voltage
through the I
2
C memory map. For information on which parameters are available via the I
2
C memory map, see
the Monitoring the UCD9081 section.
To change configuration parameters of the sequencer, a different mechanism is used. The entire set of
configuration parameters must be written at one time to the device as one large transaction over the I
2
C
interface. This ensures that the configuration of the device is consistent at any given time. The process for
configuring the UCD9081 is described in the Configuring the UCD9081 section.
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