Datasheet

REF TUE
ERR ACT
ACT
V E
1 REFTOL
RPT V 1
V 4096
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= ´ + -
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UCD90124A
SLVSAN8 –JANUARY 2012 www.ti.com
Layout guidelines
The thermal pad provides a thermal and mechanical interface between the device and the printed circuit board
(PCB). Connect the exposed thermal pad of the PCB to the device V
SS
pins and provide at least a 4 × 4 pattern
of PCB vias to connect the thermal pad and V
SS
pins to the circuit ground on other PCB layers.
For supply-voltage decoupling, provide power-supply pin bypass to the device as follows:
• 0.1-μF, X7R ceramic in parallel with 0.01-μF, X7R ceramic at pin 47 (BPCAP)
• 0.1-μF, X7R ceramic in parallel with 4.7-μF, X5R ceramic at pins 44 (V
33DIO2
) and 45 (V
33D
)
• 0.1-μF, X7R ceramic at pin 7 (V
33DIO1
)
• 0.1-μF, X7R ceramic in parallel with 4.7-μF, X5R ceramic at pin 46 (V
33A
)
Depending on use and application of the various GPIO signals used as digital outputs, some impedance control
may be desired to quiet fast signal edges. For example, when using the FPWM pins for fan control or voltage
margining, the pin is configured as a digital clock signal. Route these signals away from sensitive analog signals.
It is also good design practice to provide a series impedance of 20 Ω to 33 Ω at the signal source to slow fast
digital edges.
Estimating ADC Reporting Accuracy
The UCD90124A uses a 12-bit ADC and an internal 2.5-V reference (V
REF
) to convert MON pin inputs into
digitally reported voltages. The least significant bit (LSB) value is V
LSB
= V
REF
/2
N
where N = 12, resulting in a
VLSB = 610 μV. The error in the reported voltage is a function of the ADC linearity errors and any variations in
VREF. The total unadjusted error (E
TUE
) for the UCD90124A ADC is ±5 LSB, and the variation of VREF is ±0.5%
between 0°C and 125°C and ±1% between –40°C and 125°C. V
TUE
is calculated as V
LSB
× E
TUE
. The total
reported voltage error is the sum of the reference-voltage error and V
TUE
. At lower monitored voltages, V
TUE
dominates reported error, wheereas at higher monitored voltages, the tolerance of V
REF
dominates the reported
error. Reported error can be calculated using Equation 3, where REFTOL is the tolerance of V
REF
, V
ACT
is the
actual voltage being monitored at the MON pin, and V
REF
is the nominal voltage of the ADC reference.
(3)
From Equation 3, for temperatures between 0°C and 125°C, if V
ACT
= 0.5 V, then RPT
ERR
= 1.11%. If V
ACT
= 2.2
V, then RPT
ERR
= 0.64%. For the full operating temperature range of –40°C to 125°C, if VACT = 0.5 V, then
RPT
ERR
= 1.62%. If V
ACT
= 2.2 V, then RPT
ERR
= 1.14%.
SPACER
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