Datasheet

UCD90124A
www.ti.com SLVSAN8 –JANUARY 2012
Table 11. Configuration Options
Data Flash via JTAG Data Flash via I
2
C PMBus Commands via I
2
C
Data Flash Export (.srec or hex
Data Flash Export (.svf type file) Project file I
2
C/PMBus script
type file)
Off-Board Configuration
Fusion tools (with exclusive bus Fusion tools (with exclusive bus
Dedicated programmer
access via USB to I
2
C adapter) access via USB to I
2
C adapter)
Data flash export
Fusion tools (with exclusive bus Fusion tools (with exclusive bus
On-Board Configuration
access via USB to I
2
C adapter) access via USB to I
2
C adapter)
IC
The advantages of off-board configuration include:
• Does not require access to device I
2
C bus on board.
• Once soldered on board, full board power is available without further configuration.
• Can be partially reconfigured once the device is mounted.
Full Configuration Update while in Normal Mode
Although performing a full configuration of the UCD90124A in a controlled test setup is recommended, there may
be times in which it is required to update the configuration while the device is in an operating system. Updating
the full configuration based on methods listed in DEVICE CONFIGURATION AND PROGRAMMING section
while the device is in an operating system can be challenging because these methods do not permit the
UCD90124A to operate as required by application during the programming. During described methods the
GPIOs may not be in the desired states which can disable rails that provide power to the UCD90124A. To
overcome this, the UCD90124A has the capability to allow full configuration update while still operating in normal
mode.
Updating the full configuration while in normal mode will consist of disabling data flash write protection, erasing
the data flash, writing the data flash image and reset the device. It is not required to reset the device immediately
but make note that the UCD90124A will continue to operate based on previous configuration with fault logging
disabled until reset. See Configuration Programming of UCD Devices, available from the Documentation & Help
Center that can be selected from the Fusion GUI Help menu, for details.
JTAG INTERFACE
The JTAG port can be used for production programming. Four of the six JTAG pins can also be used as GPIOs
during normal operation. See the Pin Functions table at the beginning of the document and Table 4 for a list of
the JTAG signals and which can be used as GPIOs. The JTAG port is compatible with the IEEE Standard
1149.1-1990, IEEE Standard Test-Access Port and Boundary Scan Architecture specification. Boundary scan is
not supported on this device.
The JTAG interface can provide an alternate interface for programming the device. It is disabled by default in
order to enable the GPIO pins with which it is multiplexed. There are two conditions under which the JTAG
interface is enabled:
1. On power-up if the data flash is blank, allowing JTAG to be used for writing the configuration parameters to a
programmed device with no PMBus interaction
2. When address 126 (0x7E) is detected at power up. A short to ground or an open condition on either address
pin will cause an address 126 (0x7E) to be generated which enables JTAG mode.
The UCD90124A system clock runs at 90% of nominal speed while in JTAG mode. For this reason it is important
that the UCD90124A is not left in JTAG mode for normal application operation.
The Fusion GUI can create SVF files (See DEVICE CONFIGURATION AND PROGRAMMING section) based on
a given data flash configuration which can be used to program the desired configuration by JTAG. For Boundary
Scan Description Language (BSDL) file that supports the UCD90124A see the product folder in www.ti.com.
There are many JTAG programmers in the market and they all do not function the same. If you plan to use JTAG
to configure the device, confirm that you can reliably configure the device with your JTAG tools before commiting
to a programming solution.
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Product Folder Link(s) :UCD90124A