Datasheet

UCD90124A
www.ti.com SLVSAN8 –JANUARY 2012
Table 7. System-Reset
Delay (continued)
Delay
64 ms
128 ms
256 ms
512 ms
1.02 s
2.05 s
4.10 s
8.19 s
16.38 s
32.8 s
WATCH DOG TIMER
A GPI and GPO can be configured as a watchdog timer (WDT). The WDT can be independent of power-supply
sequencing or tied to a GPIO functioning as a watchdog output (WDO) that is configured to provide a
system-reset signal. The WDT can be reset by toggling a watchdog input (WDI) pin or by writing to
SYSTEM_WATCHDOG_RESET over I
2
C. The WDI and WDO pins are optional when using the watchdog timer.
The WDI can be replaced by SYSTEM_WATCHDOG_RESET command and the WDO can be manifested
through the Boolean Logic defined GPOs or through the System Reset function.
The WDT can be active immediately at power up or set to wait while the system initializes. Table 8 lists the
programmable wait times before the initial timeout sequence begins.
Table 8. WDT Initial Wait Time
WDT INITIAL WAIT TIME
0 ms
100 ms
200 ms
400 ms
800 ms
1.6 s
3.2 s
6.4 s
12.8 s
25.6 s
51.2 s
102 s
205 s
410 s
819 s
1638 s
The watchdog timeout is programmable from 0.001s to 32.256s. See the UCD90xxx Sequencer and System
Health Controller PMBus Command Reference for details on configuring the watchdog timeout. If the WDT times
out, the UCD90124A can assert a GPIO pin configured as WDO that is separate from a GPIO defined as
system-reset pin, or it can generate a system-reset pulse. After a timeout, the WDT is restarted by toggling the
WDI pin or by writing to SYSTEM_WATCHDOG_RESET over I
2
C.
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