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P =2.2nFx12x300kHz=0.095W
2
(6)
I=
=
P
V
0.095 W
12 V
=7.9mA
(7)
E=
1
2
2
xCV
(4)
P = CVxf
2
(5)
UCD8220
SLUS652D – MARCH 2005 – REVISED OCTOBER 2006
TrueDrive™ consists of pull-up/pull-down circuits with With V
DD
= 12 V, C
LOAD
= 2.2 nF, and f = 300 kHz,
bipolar and MOSFET transistors in parallel. The peak the power loss can be calculated as:
output current rating is the combined current from the
bipolar and MOSFET transistors. This hybrid output
stage also allows efficient current sourcing at low
With a 12-V supply, this would equate to a current of:
supply voltages.
Source/Sink Capabilities During Miller Plateau
Thermal Information
Large power MOSFETs present a large load to the
control circuitry. Proper drive is required for efficient,
The useful range of a driver is greatly affected by the
reliable operation. The UCD8220 driver has been
drive power requirements of the load and the thermal
optimized to provide maximum drive to a power
characteristics of the device package. In order for a
MOSFET during the Miller plateau region of the
power driver to be useful over a particular
switching transition. This interval occurs while the
temperature range the package must allow for the
drain voltage is swinging between the voltage levels
efficient removal of the heat produced while keeping
dictated by the power topology, requiring the
the junction temperature within rated limits. The
charging/discharging of the drain-gate capacitance
UCD8220 is available in PowerPAD™ TSSOP and
with current supplied or removed by the driver device.
QFN/DFN packages to cover a range of application
See Reference [2].
requirements. Both have an exposed pad to enhance
thermal conductivity from the semiconductor junction.
Drive Current and Power Requirements
As illustrated in Reference [3], the PowerPAD™
The UCD8220 contains drivers which can deliver high
packages offer a leadframe die pad that is exposed at
current into a MOSFET gate for a period of several
the base of the package. This pad is soldered to the
hundred nanoseconds. High-peak current is required
copper on the PC board (PCB) directly underneath
to turn on a MOSFET. Then, to turn off a MOSFET,
the device package, reducing the θ
JA
down to
the driver is required to sink a similar amount of
37.47C/W. The PC board must be designed with
current to ground. This repeats at the operating
thermal lands and thermal vias to complete the heat
frequency of the power device.
removal subsystem, as summarized in Reference [4].
Reference [2] discusses the current required to drive
Note that the PowerPAD™ is not directly connected
a power MOSFET and other capacitive-input
to any leads of the package. However, it is electrically
switching devices.
and thermally connected to the substrate which is the
ground of the device. The PowerPAD™ should be
When a driver device is tested with a discrete,
connected to the quiet ground of the circuit.
capacitive load it is a fairly simple matter to calculate
the power that is required from the bias supply. The
Circuit Layout Recommendations
energy that must be transferred from the bias supply
to charge the capacitor is given by:
In a MOSFET driver operating at high frequency, it is
critical to minimize stray inductance to minimize
overshoot/undershoot and ringing. The low output
impedance of the drivers produces waveforms with
where C is the load capacitor and V is the bias
high di/dt. This tends to induce ringing in the parasitic
voltage feeding the driver.
inductances. It is advantageous to connect the driver
There is an equal amount of energy transferred to
device close to the MOSFETs. It is recommended
ground when the capacitor is discharged. This leads
that the PGND and the AGND pins be connected to
to a power loss given by the following:
the PowerPAD™ of the package with a thin trace. It
is critical to ensure that the voltage potential between
these two pins does not exceed 0.3 V. The use of
where f is the switching frequency.
schottky diodes on the outputs to PGND and PVDD is
recommended when driving gate transformers. See
This power is dissipated in the resistive elements of
Reference 4 for a description of proper pad layout for
the circuit. Thus, with no external resistor between
the PowerPad
®
package.
the driver and gate, this power is dissipated inside the
driver. Half of the total power is dissipated when the
capacitor is charged, and the other half is dissipated
when the capacitor is discharged.
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