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PWM
+
-
3V3
CTRL
(6)
+
ISET
(4)
C
9.4pF
int
OUT
TOCLEAR
of
PWMLATCH
ON OFF
I_SC=(3.3-1.85)/(11xR_ISET)
R_ISET
0.25V
S1
R
R
3V3
(3)
PWM
+
-
3V3
CTRL
(6)
+
ISET
(4)
OUT
ON OFF
R_ISET
0.25V
S1
R
R
VIN
C
9.4pF
int
I_SC=(3.3-1.85)/(11xR_ISET)
TOCLEAR
of
PWMLATCH
11x1.4xfclkx9.4
12
(3.3-1.85)x10
W
R_ISET=
(1)
11x1.4xfclkx9.4
12
(Vin_max-1.85)x10
R_ISET=
W
(2)
1k
10k
100k
1M
1000 1000010 100
ClockFrequency − kHz
R_ISETResistance
− W
UCD8220
SLUS652D – MARCH 2005 – REVISED OCTOBER 2006
Selecting the ISET Resistor for Voltage Mode
Figure 33 shows the nominal value of resistance to
Control
use for a desired clock frequency. Note that for the
UCD8220, which has two outputs controlled by
Push-Pull logic, the output ripple frequency is equal
to the clock frequency; and each output switches at
half the clock frequency.
Selecting the ISET Resistor for Voltage Mode
Control with Voltage Feed forward
Figure 32. UCD8220 Configured in Voltage Mode
Control with an Internal Timing Capacitor
When the ISET resistor is configured as shown in
Figure 32 with the ISET resistor connected between
the ISET pin and the 3V3 pin, the device is set-up for
voltage mode control. For purposes of voltage loop
Figure 34. UCD8220 Configured in Voltage Mode
compensation the, voltage ramp is 1.4 V from the
Control with Voltage Feed Forward
valley to the peak. See Equation 1 for selecting the
proper resistance for a desired clock frequency.
When the ISET resistor is configured as shown in
Figure 34 with the ISET resistor connected between
the ISET pin and the input voltage, VIN, the device is
Where:
configured for voltage mode control with voltage feed
forward. For the purposes of voltage loop
fclk = Desired Clock Frequency in Hz.
compensation, the voltage ramp is 1.4 x Vin/Vin_max
Volts from the valley to the peak. See Equation 2 for
selecting the proper resistance for a desired clock
frequency and input voltage range.
Where:
fclk = Desired Clock Frequency in Hz.
For a general discussion of the benefits of Voltage
Mode Control with Voltage feed forward, see
Reference [5].
Figure 33. ISET Resistance vs Clock Frequency
18 Submit Documentation Feedback Copyright © 2005 – 2006, Texas Instruments Incorporated
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