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t − Time − 40ns/div
OutputV
oltage − 2V/div
−50 50 125−25 0 25 75 100
T
J
− Temperature − °C
CurrentModeSlope,
R=100k
ISET
0.134
0.136
0.138
0.140
0.142
0.144
0.146
InternalSlopeCompensationinCMC-V/ms
0.518
0.520
0.522
0.524
0.526
0.528
0.530
0.532
PWMOffsetatCTRL Input
−
V
−50 50 125−25 0 25 75 100
T
J
− Temperature − °C
UCD8220
SLUS652D – MARCH 2005 – REVISED OCTOBER 2006
TYPICAL CHARACTERISTICS (continued)
INTERNAL SLOPE COMPENSATION IN CMC
OUTPUT RISE AND FALL TIME vs
(V
DD
= 12 V, C
LOAD
= 10 nF) TEMPERATURE
Figure 27. Figure 28.
PWM OFFSET AT CTRL INPUT
vs
TEMPERATURE
Figure 29.
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