Datasheet

IN OUT
V V
D
L =
I s
-
D ¦
L
L
di (t)
v (t) = L
dt
UCD7242
www.ti.com SLUS962B –JANUARY 2010–REVISED AUGUST 2012
OPERATING FREQUENCY
Switching frequency is a key place to start the design of any DC/DC converter. This will set performance limits on
things such as: maximum efficiency, minimum size, and achievable closed loop bandwidth. A higher switching
frequency is, generally, going to yield a smaller design at the expense of a lower efficiency. The size benefit is
principally a result of the smaller inductor and capacitor energy storage elements needed to maintain ripple and
transient response requirements. The additional losses result from a variety of factors, however, one of the
largest contributors is the loss incurred by switching the MOSFETs on and off. The integrated nature of the
UCD7242 makes these losses drastically smaller and subsequently enables excellent efficiency from a few
hundred kHz up to the low MHz. For a reasonable trade off of size versus efficiency, 750kHz is a good place to
start.
V
GG
If 4.75V < V
IN
≤ 6V a simple efficiency enhancement can be achieved by connecting V
GG
_DIS and V
GG
directly to
V
IN
. This allows the solution to bypass the drop out voltage of the internal V
GG
linear regulator, subsequently
improving the enhancement of the MOSFETs. When doing this it is critical to make sure that V
GG
never exceeds
the absolute maximum rating of 7V.
INDUCTOR SELECTION
There are three main considerations in the selection of an inductor once the switching frequency has been
determined. Any real world design is an iterative trade off of each of these factors.
1. The electrical value which in turn is driven by:
(a) RMS current
(b) The maximum desired output ripple voltage
(c) The desired transient response of the converter
2. Losses
(a) Copper (P
Cu
)
(b) Core (P
fe
)
3. Saturation characteristics of the core
INDUCTANCE VALUE
The principle equation used to determine the inductance is:
(3)
During the on time of the converter the inductance can be solved to be:
(4)
Where:
V
IN
Input Voltage
V
OUT
Output voltage
f
s
Switching frequency
D Duty cycle (V
OUT
/V
IN
for a buck converter)
ΔI The target peak to peak inductor current.
In general, it is desirable to make ΔI large to improve transient response and small to reduce output ripple
voltage and RMS current. A number of considerations go into this however, ΔI = 0.4 I
OUT
results in a small I
LRMS
without an unnecessary penalty on transient response. It also creates a reasonable ripple current that most
practical capacitor banks can handle. Here I
OUT
is defined as the maximum expected steady state current.
Plugging these assumptions into the above inductance equation results in:
Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: UCD7242