Datasheet

UCD3138
www.ti.com SLUSAP2F –MARCH 2012–REVISED NOVEMBER 2013
4.19 Global I/O
Up to 30 pins in UCD3138 can be configured to serve as a general purpose input or output pin (GPIO).
This includes all digital input or output pins except for the RESET pin.
The pins that cannot be configured as GPIO pins are the supply pins, ground pins, ADC-12 analog input
pins, EADC analog input pins and the RESET pin.
There are two ways to configure and use the digital pins as GPIO pins:
1. Through the centralized Global I/O control registers.
2. Through the distributed control registers in the specific peripheral that shares it pins with the standard
GPIO functionality.
The Global I/O registers offer full control of:
1. Configuring each pin as a GPIO.
2. Setting each pin as input or output.
3. Reading the pin’s logic state, if it is configured as an input pin.
4. Setting the logic state of the pin, if it is configured as an output pin.
5. Configuring pin/pins as open drain or push-pull (Normal)
The Global I/O registers include Global I/O EN register, Global I/O OE Register, Global I/O Open Drain
Control Register, Global I/O Value Register and Global I/O Read Register.
The following is showing the format of Global I/O EN Register (GLBIOEN) as an example:
BIT NUMBER 29:0
Bit Name GLOBAL_IO_EN
Access R/W
Default 00_0000_0000_0000_0000_0000_0000_0000
Bits 29-0: GLOBAL_IO_EN – This register enables the global control of digital I/O pins
0 = Control of IO is done by the functional block assigned to the IO (Default)
1 = Control of IO is done by Global IO registers.
PIN NUMBER
BIT PIN_NAME
UCD3138-64 PIN UCD3138-40 PIN
29 FAULT[3] 43 NA
28 ADC_EXT_TRIG 12, 26 8
27 TCK 37 21
26 TDO 38 20
25 TMS 40 24
24 TDI 39 23
23 SCI_TX[1] 29 NA
22 SCI_TX[0] 14 22
21 SCI_RX[1] 30 NA
20 SCI_RX[0] 13 23
19 TMR_CAP 12, 26, 41 8, 21
18 TMR_PWM[1] 32 NA
17 TMR_PWM[0] 12, 26, 31, 37 21
16 PMBUS-CLK 15 9
15 PMBUS-DATA 16 10
14 CONTROL 30 20
13 ALERT 29 19
12 EXT_INT 26, 34 NA
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