Datasheet
UCD3138
SLUSAP2F –MARCH 2012 –REVISED NOVEMBER 2013
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4.5 DPWM Modes of Operation
The DPWM is a complex logic system which is highly configurable to support several different power
supply topologies. The discussion below will focus primarily on waveforms, timing and register settings,
rather than on logic design.
The DPWM is centered on a period counter, which counts up from 0 to PRD, and then is reset and starts
over again.
The DPWM logic causes transitions in many digital signals when the period counter hits the target value
for that signal.
4.5.1 Normal Mode
In Normal mode, the Filter output determines the pulse width on DPWM A. DPWM B fits into the rest of
the switching period, with a dead time separating it from the DPWM A on-time. It is useful for buck
topologies, among others. Here is a drawing of the Normal Mode waveforms:
32 Functional Overview Copyright © 2012–2013, Texas Instruments Incorporated
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