Datasheet

UCD3138
SLUSAP2F –MARCH 2012 –REVISED NOVEMBER 2013 www.ti.com
4.2.1.2 Memory Map (Normal Operation)
Just before the boot ROM program gives control to FLASH program, the ROM configures the memory as
follows:
Address Size Module
0x0000_0000 – 0x0000_7FFF 32K Program Flash
0x0001_0000 – 0x0001_AFFF 4K Boot ROM
0x0001_8800 – 0x0001_8FFF 2K Data Flash
0x0001_9000 – 0x0001_9FFF 4K Data RAM
4.2.1.3 Memory Map (System and Peripherals Blocks)
Address Size Module
0x0002_0000 - 0x0002_00FF 256 Loop Mux
0x0003_0000 - 0x0003_00FF 256 Fault Mux
0x0004_0000 - 0x0004_00FF 256 ADC
0x0005_0000 - 0x0005_00FF 256 DPWM 3
0x0006_0000 - 0x0006_00FF 256 Filter 2
0x0007_0000 - 0x0007_00FF 256 DPWM 2
0x0008_0000 - 0x0008_00FF 256 Front End/Ramp I/F 2
0x0009_0000 - 0x0009_00FF 256 Filter 1
0x000A_0000 - 0x000A_00FF 256 DPWM 1
0x000B_0000 – 0x000B_00FF 256 Front End/Ramp I/F 1
0x000C_0000 - 0x000C_00FF 256 Filter 0
0x000D_0000 - 0x000D_00FF 256 DPWM 0
0x000E_0000 - 0x000E_00FF 256 Front End/Ramp I/F 0
0xFFF7_EC00 - 0xFFF7_ECFF 256 UART 0
0xFFF7_ED00 - 0xFFF7_EDFF 256 UART 1
0xFFF7_F000 - 0xFFF7_F0FF 256 Miscellaneous Analog Control
0xFFF7_F600 - 0xFFF7_F6FF 256 PMBus Interface
0xFFF7_FA00 - 0xFFF7_FAFF 256 GIO
0xFFF7_FD00 - 0xFFF7_FDFF 256 Timer
0xFFFF_FD00 - 0xFFFF_FDFF 256 MMC
0xFFFF_FE00 - 0xFFFF_FEFF 256 DEC
0xFFFF_FF20 - 0xFFFF_FF37 23 CIM
0xFFFF_FF40 - 0xFFFF_FF50 16 PSA
0xFFFF_FFD0 - 0xFFFF_FFEC 28 SYS
The registers and bit definitions inside the System and Peripheral blocks are detailed in the programmer’s
guide for each peripheral.
4.2.2 Boot ROM
The UCD3138 incorporates a 4k boot ROM. This boot ROM includes support for:
• Program download through the PMBus
• Device initialization
• Examining and modifying registers and memory
• Verifying and executing program FLASH automatically
• Jumping to a customer defined boot program
24 Functional Overview Copyright © 2012–2013, Texas Instruments Incorporated
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