Datasheet
SLUU166A - December 2003 − Revised February 2004
9
UCC39002 Advanced Load-Share Controller User’s Guide, HPA027A
A high-frequency pole, f
POLE
configured with C4, should be added for noise filtering.
C4 +
1
2 p R
22
f
POLE
The total impedance at CS− must be mirrored at the non-inverting input, CS+, of the differential amplifier, as
shown by R7, R16, and C1 in Figure 1.
The CSA output voltage, V
CSO
, serves as the input to the internal unity gain LS bus driver. The module with the
highest output voltage will forward bias the internal diode located at the output of the LS bus driver and determine
the voltage on the load-share bus on the LS pin, V
LS
, making this module the master. This load-share bus acts
as a communication port between the paralleled modules. The LS pin is bi-directional. By forward biasing the
internal diode, the master sets the LS bus voltage based upon the voltage across its current sense resistor.
Because the internal diode is reverse biased on the other modules, referred to as the slaves, the LS voltage
is used as the non-inverting input to the internal LS bus receiver. The master transmits the voltage signal to the
slave modules so they can compare their voltages across their own current sense resistors with that of the
master module. The slave modules represent a load on the bias current, I
VDD
, of the master module due to the
internal 100-kΩ resistor at the LS pin. This increase in supply current for the master module is equal to:
DI
VDD
+ N
ǒ
V
LS
100 kW
Ǔ
where N is equal to the number of paralleled modules.
6.4 Determining R
ADJUST
The Sense+ terminal of the module is connected to the ADJ pin of the load-share controller. By placing a resistor,
R25 in Figure 1, between this ADJ pin and the load, an artificial Sense+ voltage is created from the voltage drop
across R
ADJUST
due to the current sunk by the internal NPN transistor. The voltage at the ADJ pin must be
maintained at approximately 1 V above the voltage at the EAO pin. This is necessary in order to keep the
transistor at the output of the internal adjust amplifier from saturating. To fulfill this requirement, R
ADJUST
can
be calculated using the following equation:
R
ADJUST
w
ƪ
DV
ADJ(max)
*
ǒ
I
OUT(max)
R
SENSE
Ǔ
ƫ
500 W
ƪ
V
OUT
*
ǒ
DV
ADJ(max)
*
ǒ
I
OUT(max)
R
SENSE
Ǔ
Ǔ
* 1V
ƫ
Also needed for consideration is the actual adjust pin current. The maximum sink current for the ADJ pin,
I
ADJ(max)
, is 6 mA as determined by the internal 500-Ω emitter resistor and 3-V clamp. The value of adjust
resistor, R
ADJUST
, is based upon the maximum adjustment range of the module, ∆V
ADJ(max)
. This adjust resistor
is determined using the following formula:
R
ADJUST
w
ƪ
DV
ADJ(max)
*
ǒ
I
OUT(max)
R
SENSE
Ǔ
ƫ
I
ADJ(max)
By selecting a resistor that meets both of these minimum requirements, the ADJ pin will be at least 1 V greater
than the EAO voltage and the adjust pin sink current will not exceed its 6 mA maximum.
(4)
(5)
(6)
(7)