Datasheet

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SLUS495H − SEPTEMBER 2001 − REVISED AUGUST 2007
12
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DESIGN PROCEDURE
The following is a practical step-by-step design procedure on how to use the UCC39002 to parallel power
modules for load sharing.
paralleling the power modules
D V
OUT
= nominal output voltage of the modules to be paralleled
D I
OUT(max)
= maximum output current of each module to be paralleled
D ∆V
ADJ
= maximum output voltage adjustment range of the power modules to be paralleled
D N = number of modules
NOTE: The power modules to be paralleled must be equipped with true remote sense or access
to the feedback divider of the module’s error amplifier.
A typical high side application for a single module is shown in Figure 5 and is repeated for each module to be
paralleled.
UDG−02078
R
SHUNT
0.005 Ω
R
ADJUST
Q1
C13 1 nF
C12
R16 16.2 kΩ
R
EAO
475 Ω
C
EAO
47 µF
C11
0.47 µF
R14
16.2 kΩ
R19
47 kΩ
R18
1 kΩ
R13
274 Ω
R15
274 Ω
1
4
2
8CS−
CS+
GND
CSO
7LS
6EAO
5ADJ
U1
UCC39002
3 VDD
TP13
TP12
Load Share Bus
TP11
V+
V−
V+
V−
S+
S−
SB2
P1
S1
Load
POWER MODULE
R
SENSE
200 Ω
Figure 5. Typical High-Side Application for Single Power Module
In Figure 5, P1 represents the output voltage terminals of the module, S1 represents the remote sense terminals
of the module, and a signal on the SB2 terminal will enable the disconnect feature of the device. The load share
bus is the common bus between all of the paralleled load share controllers. VDD must be decoupled with a good
quality ceramic capacitor returned directly to GND.