Datasheet

REF
DELAYED
CLOCK
SIGNAL
3.5 V
DELAB/CD
FROM PAD
2.5 V
CLOCK
BUSSED CURRENT
FROM ADS CIRCUIT
0.5 V
75 k:
75 k:
100 k:
ADS
CS
DELCD
DELAB
REF
TO DELAY A
AND DELAY B
BLOCKS
REF
TO DELAY C
AND DELAY D
BLOCKS
+
+
+
100 k:
UCC1895, UCC2895, UCC3895
www.ti.com SLUS157P –DECEMBER 1999–REVISED JUNE 2013
Figure 4. Adaptive Delay Set Block Diagram
Figure 5. Delay Block Diagram (One Delay Block Per Outlet)
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Product Folder Links: UCC1895 UCC2895 UCC3895