Datasheet

UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ
LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR
SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
VIN to VOUT Delay
During power-up there is a delay between VIN and VOUT. The majority of this delay time is due to the charging
time of the CT capacitor. When VIN moves more negative than the UVLO of the device with respect to GND,
the CT capacitor begins to charge. A 17-µA current sink is used only during power up to charge the CT capacitor.
When the voltage on the SD/CT pin reaches approximately –1.6 V with respect to GND, the output turns on and
regulates. The larger the value of the CT capacitor, the greater the delay time between VIN and VOUT. Figure 9
shows the VIN to VOUT start-up delay, approximately 16 ms for a circuit with CT = 0.22 µF.
Shorter delay times can be achieved with a smaller CT capacitor. The problem with a smaller CT capacitor is
that with a very large load, the circuit may stay in overcurrent mode and never turn on. A circuit with a large
capacitive load needs a large CT capacitor to operate properly.
One way to shorten the delay from VIN to VOUT during powerup, is with the use of the quick start-up circuit
shown in Figure 10.
UDG–99033
5
4
1
32
R1
R2
VOUT
VOUTS
GND
6 7
VIN VIN VIN VIN
CINVIN
8
CT
SD/CT
COUT VOUT
+
+
(+)(+)
C1
UCC384–ADJ
R3
C2
2N7000
QUICK START CURRENT
R4
0.22
µ
F
0.1
µ
F
18 k
12 k
1
µ
F
4.7
µ
F
Q1
(–)
(–)
Figure 10. Quick Start-Up Circuit for UCC384
With the quick start-up circuit, the delay time between VIN and VOUT during start-up can be reduced
dramatically. Figure 11 shows that with the quick start-up circuit, the VIN to VOUT delay time has been reduced
to approximately 1 ms.