Datasheet

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 
SLUS577C − SEPTEMBER, 2003 − REVISED MARCH 2009
2
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DESCRIPTION (CONTINUED)
The UCC3817A/18A family of PFC Controllers is directly pin for pin compatible with the UCC3817/18 family of
devices. Only the output stage of UCC3817A family has been modified to allow use of a smaller external gate
drive resistor values. For some power supply designs where an adequately high enough gate drive resistor can
not be used, the UCC3817A/18A family offers a more robust output stage at the cost of increasing the internal
gate resistances. The gate drive of the UC3817A/18A family however remains strong at ±1.2 A of peak current
capability.
UCC3817A offers an on-chip shunt regulator with low start-up current, suitable for applications utilizing a
bootstrap supply. UCC3818A is intended for applications with a fixed supply (VCC). Both devices are available
in the 16-pin D, N and PW packages.
PIN CONNECTION DIAGRAM
D, N, AND PW PACKAGES
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
PKLMT
CAOUT
CAI
MOUT
IAC
VAOUT
VFF
DRVOUT
VCC
CT
SS
RT
VSENSE
OVP/EN
VREF
AVAILABLE OPTIONS TABLE
PACKAGE DEVICES
T = T
SOIC (D) PACKAGE
(1)
PDIP (N) PACKAGE TSSOP (PW) PACKAGE
(1)
T
A
= T
J
Turn-on
Threshold
16 V
Turn-on
Threshold
10.2 V
Turn-on
Threshold
16 V
Turn-on
Threshold
10.2 V
Turn-on
Threshold
16 V
Turn-on
Threshold
10.2 V
−40°C to 85°C UCC2817AD UCC2818AD UCC2817AN UCC2818AN UCC2817APW UCC2818APW
0°C to 70°C UCC3817AD UCC3818AD UCC3817AN UCC3818AN UCC3817APW UCC3818APW
NOTES: (1) The D and PW packages are available taped and reeled. Add R suffix to the device type (e.g. UCC3817ADR) to order quantities
of 2,500 devices per reel (D package) and 2,000 devices per reel (for PW package). Bulk quantities are 40 units (D package) and
90 units (PW package) per tube.
THERMAL RESISTANCE TABLE
PACKAGE θjc(°C/W) θja(°C/W)
SOIC−16 (D) 22 40 to 70
(1)
PDIP−16 (N) 12 25 to 50
(1)
TSSOP−16 (PW) 14
(2)
123 to 147
(2)
NOTES: (1) Specified θja (junction to ambient) is for devices mounted to 5-inch
2
FR4 PC board with one ounce copper
where noted. When resistance range is given, lower values are for 5 inch
2
aluminum PC board. Test PWB
was 0.062 inch thick and typically used 0.635-mm trace widths for power packages and 1.3-mm trace
widths for non-power packages with a 100-mil x 100-mil probe land area at the end of each trace.
(2) Modeled data. If value range given for θja, lower value is for 3x3 inch. 1 oz internal copper ground plane,
higher value is for 1x1-inch. ground plane. All model data assumes only one trace for each non-fused
lead.