Datasheet

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APPLICATION INFORMATION
TIMING RESISTOR
11
CC
T
V
I
R
D =
LEADING EDGE BLANKING AND CURRENT SENSE
Power
Stage
Current
Sense
Resistor
Over−Current
Comparator
1.5 V
−
+
Soft
Start
+
−
Error
Amp
+
−
S
R
R
Q
From
Oscillator
Gate
Driver
PWM
Latch
PWM
Comparator
OUT
One
Shot
CS
OSCILLATOR
ERROR AMPLIFIER OUTPUT STAGE
UCC2810
UCC3810
SLUS162D – FEBRUARY 1999 – REVISED FEBRUARY 2007
Supply current decreases with increased R
T
by the relationship:
For more information, see the detailed oscillator block diagram.
Figure 1 shows how an external power stage is connected to the UCC3810. The gate of an external power
N-channel MOSFET is connected to OUT through a small current-limiting resistor. For most applications, a 10- Ω
resistor is adequate to limit peak current and also practical at damping resonances between the gate driver and
the MOSFET input reactance. Long gate lead length increases gate capacitance and mandates a higher series
gate resistor to damp the R-L-C tank formed by the lead, the MOSFET input reactance, and the device’s driver
output resistance.
The UCC3810 features internal leading edge blanking of the current-sense signal on both current sense inputs.
The blank time starts when OUT rises and continues for 55 ns. During that 55 ns period, the signal on CS is
ignored. For most PWM applications, this means that the CS input can be connected to the current-sense
resistor as shown in Figure 1 . However, high speed grounding practices and short lead lengths are still required
for good performance.
Figure 1. Detailed Block Diagram
The UCC3810 oscillator generates a sawtooth wave at CT. The sawtooth rise time is set by the resistor from RT
to GND. Since R
T
is biased at 1 V, the current through R
T
is 1 V/R
T
. The actual charging current is 10 times
higher. The fall time is set by an internal transistor on-resistance of approximately 100 Ω . During the fall time, all
outputs are off and the maximum duty cycle is reduced to below 50%. Larger timing capacitors increase the
discharge time and reduce frequency. However, the percentage maximum duty cycle is only a function of the
timing resistor R
T
, and the internal 100- Ω discharge resistance.
The UCC3810 error amplifiers are operational amplifiers with low-output resistance and high-input resistance.
The output stage of one error amplifier is shown in Figure 3 . This output stage allows the error amplifier output
to swing close to GND and as high as one diode drop below 5 V with little loss in amplifier performance.
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