Datasheet

P 0.432 W
I = = = 0.036A
V 12 V
2
1
P = 2 CV f
2
´
2
1
E = CV
2
UCC27321 , UCC27322
UCC37321, UCC37322
www.ti.com SLUS504G –SEPTEMBER 2002–REVISED MAY 2013
VDD
Although quiescent VDD current is very low, total supply current will be higher, depending on OUTA and OUTB
current and the operating frequency. Total VDD current is the sum of quiescent VDD current and the average
OUT current. Knowing the operating frequency and the MOSFET gate charge (Qg), average OUT current can be
calculated from:
I
OUT
= Qg x f, where f is frequency
For the best high-speed circuit performance, two V
DD
bypass capacitors are recommended to prevent noise
problems. The use of surface mount components is highly recommended. A 0.1-µF ceramic capacitor should be
located closest to the VDD to ground connection. In addition, a larger capacitor (such as 1-µF) with relatively low
ESR should be connected in parallel, to help deliver the high current peaks to the load. The parallel combination
of capacitors should present a low impedance characteristic for the expected current levels in the driver
application.
Drive Current and Power Requirements
The UCC37321/2 family of drivers are capable of delivering 9-A of current to a MOSFET gate for a period of
several hundred nanoseconds. High peak current is required to turn an N-channel device ON quickly. Then, to
turn the device OFF, the driver is required to sink a similar amount of current to ground. This repeats at the
operating frequency of the power device. An N-channel MOSFET is used in this discussion because it is the
most common type of switching device used in high frequency power conversion equipment.
References 1 and 2 contain detailed discussions of the drive current required to drive a power MOSFET and
other capacitive-input switching devices. Much information is provided in tabular form to give a range of the
current required for various devices at various frequencies. The information pertinent to calculating gate drive
current requirements will be summarized here; the original document is available from the TI website.
When a driver device is tested with a discrete, capacitive load it is a fairly simple matter to calculate the power
that is required from the bias supply. The energy that must be transferred from the bias supply to charge the
capacitor is given by:
, where C is the load capacitor and V is the bias voltage feeding the driver.
There is an equal amount of energy transferred to ground when the capacitor is discharged. This leads to a
power loss given by the following:
, where f is the switching frequency.
This power is dissipated in the resistive elements of the circuit. Thus, with no external resistor between the driver
and gate, this power is dissipated inside the driver. Half of the total power is dissipated when the capacitor is
charged, and the other half is dissipated when the capacitor is discharged. An actual example using the
conditions of the previous gate drive waveform should help clarify this.
With V
DD
= 12 V, C
LOAD
= 10 nF, and f = 300 kHz, the power loss can be calculated as:
P = 10 nF × (12)
2
× (300 kHz) = 0.432 W
With a 12-V supply, this would equate to a current of:
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