Datasheet

UCC29910A
www.ti.com SLUSAK8A – MAY 2011– REVISED JUNE 2011
APPLICATION INFORMATION
The UCC29910A controls a Buck PFC stage and is particularly suited to AC/DC applications in the power range
from 65 W to 130 W. A fully characterised reference design using the UCC29910A PFC controller and the
UCC29900 Integral Cycle Controller is available on request. The design is for a 90 W PSU intended for laptop
adapter applications. It comprises a Buck PFC front end using the UCC29910A to convert line power to a
nominal 84 VDC. A UCC29900 controls the conversion of this bulk voltage to a nominal 19.25 V output using a
half bridge output power stage. The paragraphs following give some details on how the UCC29910A has been
used in this application. Additional guidelines for both the UCC29910A and UCC29900 are available on request.
POR
A Power On Reset function operates at turn-on.
Start Up Bias Control
This block controls the BIASCTRL output which may be used to control an external depletion mode start-up FET
during the start-up phase and also while the UCC29910A is operating in SmartBurst Light Load mode (explained
below). After POR the BIASCTRL output is held low until the voltage at the BIASSNS pin reaches V
B(max)
at
which point BIASCTRL is driven high which turns the external FET off and the start-up phase is initiated. The
UCC29910A continues to monitor the voltage at the BIASSNS pin and if it drops below V
B(min)
BIASCTRL goes
low again, turning the start-up FET on again. At the end of the start-up phase the UCC29910A enters normal
mode operation and BIASCTRL pin is held high. In normal mode, auxiliary windings maintain the V
CCA
rail (see
Figure 5). When the UCC29910A is operating in SmartBurst light-load mode there is a possibility that these
auxiliary windings can no longer supply enough current to support the bias supply within acceptable limits. The
start-up bias control block prevents the bias rail from collapsing by setting the BIASCTRL pin low if VBIASSNS
drops below V
B(min)
. This signal may be used to turn on the external start-up FET on, thereby supplying added
current to the bias rail. If VBIASSNS increases above V
BLO
(495 mV approx.) BIASCTRL is set low again. The
bias rail is therefore controlled between acceptable limits.
Brown_Out Detection and Filter, Latch Reset Detect
If the RMS voltage at the LINESNS pin drops below V
BL
for more than 21 ms (approx) the controller latches off.
In this condition, the PFCDRV pin is low. The UCC29910A recovers from this state if the RMS voltage at the
LINESNS pin falls below the reset level (V
RS
= 218-mV RMS) for at least 120 ms and then increases to at least
V
BH
. When this happens the UCC29910A enters its start-up mode after a 10-s timeout. Power cycling is not
needed for recovery after a brown_out event.
Smart Start, Soft Start, Burst Control
This module controls the gate control logic during the start-up phase.
Oscillator
The internal oscillator runs at a fixed 100 kHz.
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Product Folder Link(s): UCC29910A