Datasheet
UCC29910A
www.ti.com
SLUSAK8A – MAY 2011– REVISED JUNE 2011
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range, all the voltages refer to the VSS pin (unless otherwise noted)
MIN NOM MAX UNIT
T
A
Operating free air temperature −40 105 °C
VDD Input Voltage 3.0 3.6
V
All Inputs 0 VDD
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Supply Current
I
VDD
Operating current V
DD
= 3.3 V 5 8 mA
Voltage Monitoring
(1)
V
NM
VBULK nominal Normal mode
(2)
PFCDRV = 100 kHz 1.042 1.048 1.054 V
V
BH
VLINESNS start-up VB(min) < VBIASSNS < V
B(max)
258 264 270
V
BL
VLINESNS brownout Normal mode
(2)
243 249 255 mVRMS
V
LM
VLINESNS max Normal mode
(2)
925 931 937
V
B(max
VBIASSNS max VLINESNS > V
BH
907 913 919
)
mV
V
B(min)
VBIASSNS min VLINESNS > V
BH
451 457 463
FAULT Input
t
f
Latch Time
(3)
Normal mode
(2)
, FAULT pin goes < 0.8 V 100 µs
Positive going input threshold
V
IT+
1.45 2.5
voltage
Negative going input threshold
V
IT-
0.8 1.85 V
voltage
Input voltage hysteresis VIT+ -
V
HYS
0.3 1
VIT-
PFCDRV section
f
SW
Switching frequency Normal mode
(2)
94 100 106 kHz
At PFCDRV pin, normal mode
(2)
, VLINESNS = V
BH
,
D
MAX
Max duty cycle 89% 90% 91%
VBULK = 1.025 V
VDD-
I
O
= -1.5 mA VDD
0.25V
High level output voltage at
V
OH
PFCDRV pin
VDD-
I
O
= -6 mA VDD
V
0.6V
I
O
= 1.5 mA 0 0.25
Low Level Output Voltage at
V
OL
PFCDRV pin
I
O
= 6 mA 0 0.6
BIASCTRL Output
Low level output voltage at Start-up mode
(4)
, VBIASSNS increasing and <
V
BC
0 0.25
BIASCTRL pin V
B(max)
, I
O
= 1.5 mA
V
High level output voltage at Start-up mode
(4)
, VBIASSNS decreasing and > VDD-
VDD
BIASCTRL pin V
B(min)
, I
O
= -1.5mA 0.25V
(1) VBULK, VLINESNS and VBIASSNS voltage thresholds are based on VREFIN = 1.500 V. These will change proportionally as VREFIN
changes. Input bias current at these pins is ±50 nA max.
(2) Normal mode entered when VDD present, V
REFIN
= 1.500 V, VLINESNS increased from 0 to V
BH
< VLINESNS < V
LM
, VBIASSNS
increased from 0 to V
B(max)
< VBIASSNS < 1.025 V then reduced to V
B(min)
< VBIASSNS < V
B(max)
, V
CS
= 150 mV, VBULK increased to
V
NM
then reduced to 1.025 V. There is a 600-ms timeout on this process.
(3) FAULT inputs shorter than t
f
cause a non-latched shutdown. FAULT inputs longer than t
f
cause a latched shutdown.
(4) Start-up mode entered when VDD present, VLINESNS increased from 0 to V
BH
< VLINESNS < V
LM
, VBIASSNS increased from 0 to
V
B(max)
< VBIASSNS < 1.025 V then reduced to V
B(min)
< VBIASSNS < V
B(max)
, VBULK = 0 V. There is a 600 ms timeout on this
process.
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