Datasheet
UCC29910A
SLUSAK8A –MAY 2011– REVISED JUNE 2011
www.ti.com
SmartStart, V
BULK
Ramp-Up
Once V
CCA
has reached 12 V and Q12 has been turned off, and VLINESNS > V
BH
, the PFCDRV output of U1
becomes active and begins driving the main power MOSFET. The SmartStart algorithm increases V
BULK
, the
voltage across C2 and C21, as rapidly as possible. This is done by transferring the maximum amount of energy
possible during each pulse set. The UCC29910A requires that the inductor has a Volt-sec product withstand
rating of 600 Vµs. In fact any inductor suitable for application in a buck PFC stage will already meet this
requirement in order to carry the full-load currents involved without saturating, therefore the Volt-sec rating will
not result in any additional constraints on the inductor design. However it is more convenient to think in terms of
applied Volt-sec product rather than the peak-inductor current.
The UCC29910A’s SmartStart algorithm generates a series of pulses for the switching MOSFET which apply a
constant Volt-sec product to the inductor during the on and off intervals. This ensures that the inductor current is
ramped up as high as possible while the MOSFET is on and then decays to zero during the off time. In fact, T
OFF
is extended to 110% of nominal which provides margin to ensure the inductor current ramps back to zero. The
UCC29910A measures the instantaneous line voltage and the output voltage (V
HV
and V
BULK
in Figure 1). The
voltage applied to the inductor when Q1 is on is then found by subtracting these two values. It then calculates an
appropriate T
ON
corresponding to a 600 V x µs product. T
OFF
is calculated in a similar fashion except that the
inductor voltage during the off time is the voltage on the capacitors C2 and C21 (V
BULK
) plus the forward voltage
drop in D1 which is assumed to be 0.6 V. Inductor current is controlled on a cycle-by-cycle basis by constraining
the T
ON
and T
OFF
values so that the inductor Volt-sec product is never exceeded. The initial T
OFF
intervals are
typically 1.1 ms long because the bulk capacitor voltage is still very low. As V
BULK
increases, the current
ramp-down rate increases so that the required T
OFF
reduces, allowing the pulses to occur more frequently. In
addition, as V
BULK
rises, the voltage across the PFC inductor during T
ON
will drop, so the on-time is adjusted to
maintain a constant PFC inductor volt-secs product.
During ramp-up the UCC29910A monitors the voltage at the BIASSNS pin and if it falls below V
B(MIN)
the
ramp-up operation is terminated and the BIASCTRL pin goes low. In the reference design the minimum bias
voltage will be approximately 6 V. When BIASCTRL goes low, Q12 is turned on again and C45 will begin
charging back up towards 12 V. The ramp-up phase is then re-started. A maximum of 10 such restarts is allowed
before the UCC29910A goes into a latched shutdown mode. Line power cycling is necessary for recovery from
this mode.
Typically, the capacitor voltage increases monotonically until the voltage at the VBULK pin reaches 1.024 V. This
is slightly lower than V
NM
and in the circuit of Figure 1 corresponds to a V
BULK
across C2 and C21 of 82 V. The
UCC29910A then switches to Normal Mode operation. This approach allows the fastest possible start-up time.
In order to save standby power at no load, once the start-up phase is complete, and V
BULK
is being regulated
(either by the normal mode voltage regulation loop, or the SmartBurst light-load mode), the BIASCTRL pin is
driven high. This turns the start-up fet off which eliminates the power loss in the start-up current path. While in
SmartBurst mode the voltage at the BIASSNS input is monitored. If the voltage at this pin drops below V
B(min)
then the start-up fet is turned back on to recharge the capacitors on the V
CCA
rail. In this way and with the
component values shown, the V
CCA
rail is maintained above 6 V.
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