Datasheet
SLUS430A – APRIL 1999 – REVISED DECEMBER 2000
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
detailed descriptions (continued)
ground (GND)
This pin is the reference point for grounding all analog functions and must be kept as clean as possible from
all switching noise. It should be closely bypassed to VDD.
timing resistor (RT)
A resistor from this pin to GND establishes a current,
I
SET
2V
RT
which is mirrored internally for several functions. It establishes the free–running startup switching frequency with
an internal capacitor according to the relationship,
fs
8.0 10
9
RT
The startup oscillator has a rise and fall time set to limit the duty-cycle of the power switch to a maximum of 72%,
a limit that is maintained even after the feedback signal takes command. The range of RT is 22.2 kΩ to 133 kΩ,
giving a free-run frequency range range of 60 kHz to 360 kHz, respectively. Variations in the free-running
oscillator frequency overtemperature are very small. The typical temperature coefficient is –40 Hz per degree
Celsius, measured at 150 kHz.
voltage reference (REF)
This 5-V output is usable with external loads of up to 10 mA. The voltage is also the source for all internal analog
threshold settings and should be bypassed with a minimum of 0.1-µF capacitance to GND.
soft-start (SS)
The pin implements the primary-side soft-start function. This is the connection point for an external capacitor
that determines the rate of increase in commanded pulse width for the power switch at startup. It also serves
as the ac ground return for the feedback pulse transformer to provide a tracking bias for the FB input.
power (VDD)
The power input connection for all the control circuitry conducts all the gate charge current for the power FET.
It should be closely bypassed with at least 1.0-µF to GND. This pin is internally shunt regulated to clamp at
17.5 V to protect the internal components. So if a voltage source above this value is possible, external current
limiting must be provided.
(1)
(2)