Datasheet

Connecting WDO to RES
Layout Considerations
UCC2946-Q1
SGLS273B – OCTOBER 2004 – REVISED MARCH 2009 ................................................................................................................................................. www.ti.com
To provide design flexibility, the reset and watchdog circuits in the UCC2946 have separate outputs. Each output
independently drives high or low, depending on circuit conditions explained previously.
In some applications, it may be desirable for either the RES or WDO to reset the microprocessor. This can be
done by connecting WDO to RES. If the pins try to drive to different output levels, the low output level dominates.
Additional current flows from VDD to GND during these states. If the application cannot support additional current
(during fault conditions), RES and WDO can be connected to the inputs of an OR gate whose output is
connected to the microprocessor ’ s reset pin.
A 0.1- µ F capacitor connected from VDD to GND is recommended to decouple the UCC2946 from switching
transients on the VDD supply rail.
Because RP and WP are precision current sources, capacitors C
RP
and C
WP
should be connected to these pins
with minimal trace length to reduce board capacitance. Care should be taken to route any traces with high
voltage potential or high speed digital signals away from these capacitors.
Resistors R1 and R2 generally have a high ohmic value; traces associated with these parts should be kept short
to prevent any transient producing signals from coupling into the high-impedance RTH pin.
8 Submit Documentation Feedback Copyright © 2004 – 2009, Texas Instruments Incorporated
Product Folder Link(s): UCC2946-Q1