Datasheet

APPLICATION INFORMATION
100
40
0
110 120 130 140 150 160 170 180
20
100
60
80
120
180
140
160
200
OVERDRIVE VOLTAGE WITH RESPECT TO
RESET THRESHOLD
vs
DELAY TO OUTPUT LOW ON R
ESB
V
TH
− Overdrive Voltage − mV
T
DELAY
− Delay Time − µs
R
T
Senses Glitch,
RES Goes Low for Reset Period
Glitches
Ignored,
RESB
Remains
High
UCC2946-Q1
SGLS273B – OCTOBER 2004 – REVISED MARCH 2009 ................................................................................................................................................. www.ti.com
The UCC2946 supervisory circuit provides accurate reset and watchdog functions for a variety of microprocessor
applications. The reset circuit prevents the microprocessor from executing code during undervoltage conditions,
typically during power-up and power-down. To prevent erratic operation in the presence of noise, voltage glitches
where voltage amplitude and time duration are less than the values specified in Figure 1 are ignored.
Figure 1.
The watchdog circuit monitors the microprocessor ’ s activity, if the microprocessor does not toggle WDI during the
programmable watchdog period WDO goes low, alerting the microprocessor ’ s interrupt of a fault. The WDO pin is
typically connected to the non-maskable input of the microprocessor so that an error recovery routine can be
executed.
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Product Folder Link(s): UCC2946-Q1