Datasheet

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SLUS247F − APRIL 1997 − REVISED NOVEMBER 2007
5
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APPLICATION INFORMATION
PROGRAMMING THE RESET VOLTAGE AND RESET PERIOD
The UCCx946 allows the reset trip voltage to be programmed with two external resistors. In most applications
VDD is monitored by the reset circuit, however, the design allows voltages other than VDD to be monitored.
Referring to Figure 2, the voltage below which reset is asserted is determined by:
V
RESET
+ 1.235
ǒ
R1 ) R2
R2
Ǔ
In order to keep quiescent currents low, resistor values in the megaohm range can be used for R1 and R2. A
manual reset can be easily implemented by connecting a momentary push switch in parallel with R2. RES
is
ensured to be low with VDD voltages as low as 1 V.
UDG−98002
6
7
WDI
WP
8
VDD
3
5
POWER TO
CIRCUITRY
WDO
GND
EDGE DETECT
WATCHDOG
TIMING
100 mV
2
RTH
4
RP
400 nA
POWER
ON RESET
VDD
RESET
NMI
I/O
uP
RES
+
−
+
−
+
−
+
−
+
SQ
QR
1.235 V
SQ
QR
R2
R1
400 nA
+
+
1.235 V
A3
A2
A1
A0
CLK
CLR
8−BIT
COUNTER
SQ
QR
1
C
RP
C
WP
Figure 2. Typical Application Diagram
(1)