Datasheet

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SLUS274A – JANUARY 1999 – REVISED APRIL 2003
5
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DETAILED PIN DESCRIPTIONS (continued)
SD/FLT
This pin provides fault output indication and shutdown control. Interface into and out of this pin is usually
performed through level shift transistors. When 20 µA is sourced into this pin, shutdown drives high causing the
output to disable the N-channel MOSFET pass device. When opened, and under a non-fault condition, the
SD/FLT pin pulls to a low state. When a fault is detected by the fault timer, or undervoltage lockout, this pin drives
to a high state, indicating the output MOSFET is off.
VDD
Current driven with a resistor to a voltage at least 10-V more positive than VSS. Typically a resistor is connected
to ground. The 10-V shunt regulator clamps VDD at 10 V above the VSS pin, and is also used as an output
reference to program the maximum allowable sourcing current.
BLOCK DIAGRAM
1
2
LINEAR
CURRENT
AMPLIFIER
PL
7 OUT
+
–
+
–
IMAX
+
8
+
–
6 SENSE
5 VSS
4CT
ON–TIME
CONTROL
3
VDD
UVLO
5.0V
REF
LOGIC
SUPPLY
+
1=
UNDERVOLTAGE
+
–
SOURCE
ONLY
SD/FLT
V
DD
0.2 V
OVERCURRENT
COMPARATOR
DISABLE
5.0 V
OVERLOAD COMPARATOR
50 mV
UDG–99001
50
V
DD
V
DD
20 µA
9.5-V SHUNT
REGULATOR