Datasheet
UCC2897A
SLUS829D -- AUGUST 2008 -- REVISED JULY 2009
7
www.ti.com
TERMINAL FUNCTIONS
TERMINAL
NAME
UCC2897A
TSSOP--20
(PW)
UCC2897A
QFN--20
(RGP)
I/O DESCRIPTION
AUX 14 11 O
This output drives the auxiliary clamp MOSFET which is turned on when the main
PWM switching device is turned off. The AUX pin can directly drive the auxiliary
switch with 2-A source turn -on current and 2-A sink turn-off current.
CS 9 6 I
This pin is used to sense the peak current utilized for current mode control and for
current limiting functions. The peak signal which can be applied to this pin before
pulse--by--pulse current limiting activates is approximately 0.5 V.
FB 11 8 I
This pin is used to bring the error signal from an external optocoupler or error amplifi-
er into the PWM control circuitry. Often, there is a resistor tied from FB to VREF, and
an optocoupler is used to pull the control pin closer to GND to reduce the pulse width
of the OUT output driving the main power switch of the converter.
GND 8 5 --
This pin serves as the fundamental analog ground for the PWM control circuitry. This
pin should be connected to PGND directly at the device.
LINEOV 19 16 I
This is an input pin of voltage comparator with programmable hysteresis and 1.27--V
threshold, providing LINE overvoltage or other functions.
LINEUV 18 15 I
This pin provides a means to accurately enable/disable the power converter stage by
monitoring the bulk input voltage or another parameter. When the circuit initially starts
(or restarts from a disabled condition), a rising input on LINEUV enables the outputs
when the threshold of 1.27 V is crossed. After the circuit is enabled, then a falling
LINEUV signal disables the outputs when the same threshold is reached. The hyster-
esis between the two levels is programmed using an internal current source.
OUT 15 12 O
This output pin drives the main PWM switching element MOSFET in an active clamp
controller. It can directly drive an N--channel device with 2--A source turn--on current
and 2 --A sink turn--off current. Recommend connecting a 10--kΩ resistor from this pin
to PGND pin.
PGND 13 10 --
The PGND should serve as the current return for the high--current output drivers OUT
and AUX. Ideally, the current path from the outputs to the switching devices, and back
would be as short as possible, and enclose a minimal loop area.
PVDD 16 13 I
This is the supply pin for the power devices. It is separated internally from the VDD
pin.
RSLOPE 10 7 I
A resistor connected from this pin to GND programs an internal current source that
sets the slope compensation ramp for the current mode control circuitry.
RTDEL 3 20 I
A resistor from this pin to GND programs the turn--on delay of the two gate drive out-
puts to accommodate the resonant transitions of the active clamp power converter.
ROFF 5 2 I
A resistor connected from this pin to GND programs an internal current source that
discharges the internal timing capacitor.
RON 4 1 I
A resistor connected from this pin to GND programs an internal current source that
charges the internal timing capacitor.
SS/SD 12 9 I
A capacitor from SS/SD to ground is charged by an internal current source of I
RON
to
program the soft--start interval for the controller. During a fault c ondition this capacitor
is discharged by a current source equal to I
RON
.
SYNC 7 4 I
The SYNC pin serves as a bidirectional synchronization input for the internal oscilla -
tor. The synchronization function is impl emented such that the user programmable
maximum duty cycle (set by RON and ROFF) remains accurate during synchronized
operation. Thiis pin s hould be left open if not used. Its external capacitance should be
minimized. No capacitors should be connected to this pin.
VDD 17 14 I
This is the power supply for the device. There should be a 1.0--μF capacitor directly
from VDD to PGND. The capacitor value should be minimum 10 times bigger than
that on VREF. PGND and GND should be connected externally and directly from
PGND pin to GND pin.
VIN 1 18 I
This pin is connected to the input power rail directly. Inside the device, a high--voltage
start--up device is utilized to provide the start--up current for the controller until a boot-
strap type bias rail becomes available.
VREF 6 3 O
This is the 5--V reference voltage that can be utilized for an external load of up to 5
mA. Since this reference provides the supply rail for internal logic, it should be by-
passed to AGND as close as possible to the device. The VREF bias profile may not
be monotonic before V DD reaches 5 V.