Datasheet

UCC2897A
SLUS829D -- AUGUST 2008 -- REVISED JULY 2009
19
www.ti.com
FUNCTIONAL DESCRIPTION
When a w ider than

1 − D
MAX

× T
SYNC
pulse is connected to the SYNC input, the oscillator is not able to
maintain the maximum duty cycle, originally set by the timing resistor ratio (R
ON
,R
OFF
). Furthermore, the timing
capacitor waveform has a flat portion as highlighted by the vertical marker in the timing diagram. During this
flat portion of the waveform both outputs is off which state is not compatible with the operation o f active clamp
power converters. Therefore, this operating mode is not recommended .
Note that both outputs of the UCC2897A controller are off if the synchronization signal stays continuously high.
When two UCC2897A’s are synchronized by tying their SYNC pins together, they will operate in--phase. It is
possible to set different maximum duty cycle limits for the two UCC2897’s and still synchronize them by a simple
connection between their respective SYNC terminals.
APPLICATION INFORMATION: SETUP GUIDE
3
4
5
6
19
18
17
15
LINEOV
VDD
OUT
RDEL
RON
ROFF
VREF
UCC2897A
7
8
9
10
SYNC
GND
CS
RSLOPE
14
13
12
11
AUX
PGND
SS/SD
FB
RF
POWER STAGE
ISOLATED FEEDBACK
1 VIN
2N/C
16
20N/C
PVDD
R
IN2
R
IN4
R
DEL
R
ON
R
OFF
C
VREF
C
F
R
SLOPE
C
SS
R
VREF
C
BIAS
C
HF
R
IN3
R
IN1
+V
IN
-- V
IN
LINEUV
R
OT
Figure 7. UCC2897A Typical Setup