Datasheet

UCC2897A
SLUS829D -- AUGUST 2008 -- REVISED JULY 2009
12
www.ti.com
DETAILED PIN DESCRIPTIONS (continued)
VDD
The VDD rail is the primary bias for the internal, high-current gate drivers, the internal 5-V bias regulator and
for parts of the undervoltage lockout circuit. To reduce switching noise on the bias rail, a good quality ceramic
capacitor (C
HF
) must be placed very closely between the VDD pin and PGND (pin 11) to provide adequate
filtering. The recommended C
HF
value is 1-μF for most applications but its value might be affected by the
properties of the external MOSFET transistors used in the power stage.
In addition to the low-impedance, high-frequency filtering, the controller’s bias rail requires a larger value energy
storage capacitor (C
BIAS
) connected parallel to C
HF
. The energy storage capacitor must provide the hold up time
to operate the UCC2897A (including gate drive power requirements) during start up. In steady state operation
the controller must be powered from a bootstrap winding off the power transformer or by an auxiliary bias supply.
In case of an independent auxiliary bias supply, the energy storage is provided by the output capacitance of the
bias supply. The capacitor values are also determined by the capacitor values connected to VREF. The
capacitance on VREF and VDD should be in a minimum ratio of 1:10.
LINEUV
This input monitors the incoming power source to provide an accurate undervoltage lockout function with user
programmable hysteresis for the power supply c ontrolled by the UCC2897A. The unique property of the
UCC2897A is to use only one pin to implement these functions without sacrificing on performance. The input
voltage of the power supply is scaled to the precise 1.27-V threshold of the undervoltage lockout comparator
by an external resistor divider (R
IN1
,R
IN2
in Figure 7). Once the line monitor’s input threshold is exceeded, an
internal current source gets connected to the LINEUV pin. The current generator is programmed by the R
DEL
resistor connected to pin 1 of the controller. The actual current level is given as:
I
HYST
=
V
REF
2
×
1
R
DEL
× 0.05
As this current flows through R
IN2
of the input divider, the undervoltage lockout hysteresis is a function of I
HYST
and R
IN2
allowing accurate programming of the hysteresis of the line monitoring circuit. When LINEUV is
detected, PWM follows VSS capacitor discharge and soft stop function is provided. The soft--start capacitor
starts discharging when the soft--start capacitor voltage reaches 2.5 V. Both OUT and AUX stop switcing while
soft--start capacitor continues discharging until its voltage reaches 0.5 V when the s oft start is resumed on the
assumption of all other soft start conditions are met.
For more information on how to program the line monitoring function refer to the Setup Guide of this datasheet.
(7)