Datasheet

t
PERIOD
OUTA
OUTC
OUTA
OUTB
Same applies to OUTB and OUTD
Same applies to OUTC and OUTD
t = t – t
DELAY f(OUTB) f(OUTA)
t = t – t
DELAY f(OUTC) f(OUTA)
F = 180 ×
t
f
(
OUTC
)
– t
f
(
OUTA
)
t
PERIOD
or
t
f
(
OUTC
)
f
(
OUTB
)
t
PERIOD
– t
F = 180 ×
Space Space
UCC2895-Q1
SLUS783C MAY 2008REVISED AUGUST 2012
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
V
DD
= 12 V, R
T
= 82 k, C
T
= 220 pF, R
DELAB
= 10 k, R
DELCD
= 10 k, C
REF
= 0.1 μF, C
VDD
= 0.1 μF, no load on the outputs,
T
A
= T
J
= –40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PWM Comparator
EAOUT to RAMP input offset voltage RAMP = 0 V, DELAB = DELCD = REF 0.7 0.85 1.05 V
Minimum phase shift
(4)
RAMP = 0 V, EAOUT = 650 mV 0 0.85% 1.5%
(OUTA to OUTC, OUTB to OUTD)
Delay
(5)
0 V < RAMP < 2.5 V, EAOUT = 1.2 V,
t
DELAY
70 120 ns
(RAMP to OUTC, RAMP to OUTD) DELAB = DELCD = REF
I
R(bias)
RAMP bias current RAMP < 5 V, CT = 2.2 V –5 5 μA
I
R(sink)
RAMP sink current RAMP = 5 V, CT = 2.6 V 11 19 mA
(4) Minimum phase shift is defined as:
where:
t
f(OUTA)
= falling edge of OUTA signal
t
f(OUTB)
= falling edge of OUTB signal
t
f(OUTC)
= falling edge of OUTC signal
t
f(OUTD)
= falling edge of OUTD signal
t
PERIOD
= period of OUTA or OUTB signal
Space
(5) Output delay is measured between OUTA and OUTB or between OUTC and OUTD. Output delay is defined as shown in the following
figure, where:
t
f(OUTA)
= falling edge of OUTA signal
t
r(OUTB)
= rising edge of OUTB signal
6 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated
Product Folder Link(s): UCC2895-Q1