Datasheet

UCC2895-Q1
SLUS783C –MAY 2008–REVISED AUGUST 2012 www.ti.com
DETAILED PIN DESCRIPTIONS
Adaptive Delay Set (ADS)
This function sets the ratio between the maximum and minimum programmed output-delay dead time. When the
ADS pin is directly connected to the CS pin, no delay modulation occurs. The maximum delay modulation occurs
when ADS is grounded. In this case, delay time is four times longer when CS = 0 than when CS = 2 V (the peak-
current threshold); ADS changes the output voltage on the delay pins DELAB and DELCD by Equation 1:
V
DEL
= [0.75 × (V
CS
– V
ADS
)] + 0.5 V (1) (1)
where V
CS
and V
ADS
are in volts. ADS must be limited to between 0 V and 2.5 V and must be less than or equal
to CS. DELAB and DELCD are clamped to a minimum of 0.5 V.
Current Sense (CS)
CS is the inverting input of the current-sense comparator and the noninverting input of the overcurrent
comparator and the ADS amplifier. The current-sense signal is used for cycle-by-cycle current limiting in peak-
current mode control, and for overcurrent protection in all cases with a secondary threshold for output shutdown.
An output disable initiated by an overcurrent fault also results in a restart cycle, called soft stop, with full soft
start.
Oscillator Timing Capacitor (CT)
The oscillator charges CT via a programmed current. The waveform on CT is a sawtooth, with a peak voltage of
2.35 V. The approximate oscillator period is calculated by Equation 2:
t
OSC
= [(5 × R
T
× C
T
)/48] + 120 ns (2) (2)
where C
T
is in farads, R
T
is in Ω, and t
OSC
is in seconds. C
T
can range from 100 pF to 880 pF.
NOTE
A large C
T
and a small R
T
combination results in extended fall times on the CT waveform.
The increased fall time increases the SYNC pulse duration, hence limiting the maximum
phase shift between OUTA, OUTB and OUTC, OUTD outputs, which limits the maximum
duty cycle of the converter (see Figure 1).
Delay Programming Between Complementary Outputs (DELAB, DELCD)
DELAB programs the dead time between switching of OUTA and OUTB, and DELCD programs the dead time
between OUTC and OUTD. This delay is introduced between complementary outputs in the same leg of the
external bridge. The UCC2895N allows the user to select the delay, during which the resonant switching of the
external power stages takes place. Separate delays are provided for the two half bridges to accommodate
differences in resonant-capacitor charging currents. The delay in each stage is set according to Equation 3:
t
DELAY
= [(25 × 10
–12
× R
DEL
)/V
DEL
] + 25 ns (3) (3)
where V
DEL
is in volts, R
DEL
is in ohms, and t
DELAY
is in seconds. DELAB and DELCD can source approximately
1 mA maximum. Choose the delay resistors so that this maximum is not exceeded. Programmable output delay
is defeated by tying DELAB and/or DELCD to REF. For optimum performance, keep stray capacitance on these
pins at less than 10 pF.
Error Amplifier (EAOUT, EAP, EAN)
EAOUT is connected internally to the noninverting input of the PWM comparator and the no-load comparator.
EAOUT is internally clamped to the soft-start voltage. The no-load comparator shuts down the output stages
when EAOUT falls below 500 mV, and allows the outputs to turn on again when EAOUT rises above 600 mV.
EAP is the noninverting input and the EAN is the inverting input to the error amplifier.
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