Datasheet

I
OUT
V
OUT
x (1-D) / D
V
OUT
T
ON
= 0.5 x D x T
SW(nom)
I
LOUT
V
LOUT
V
DS
QF
V
DS
QE
I
PR
T
AFSET2
T
AFSET1
T
BESET1
T
BESET2
T
ABSET1
T
CDSET2
T
ABSET2
T
SW(nom)
T
SW(osc)
OUTE
OUTF
OUTD
OUTC
OUTB
OUTA
T
CDSET1
UCC28950
SLUSA16B –MARCH 2010– REVISED OCTOBER 2011 www.ti.com
APPLICATION INFORMATION
UCC28950 Application Description
The efficiency improvement of phase-shifted full-bridge DC/DC converter with UCC28950 is achieved by using
the synchronous rectification technique, control algorithm providing ZVS condition over the entire load current
range, accurate adaptive timing of the control signals between primary and secondary FETs and special
operating modes at light load for the highest efficiency and power saving. The simplified electrical diagram of this
converter is shown in Figure 48. The controller device is located on the secondary side of converter, although it
could be located on primary side as well. The location on secondary side allows easy power system level
communication and better handling of some transient conditions that require fast direct control of the
synchronous rectifier MOSFETs. The power stage includes primary side MOSFETs, QA, QB, QC, QD and
secondary side synchronous rectifier MOSFETs, QE and QF. For example, for the 12-V output converters in
server power supplies use of the center-tapped rectifier scheme with L-C output filter is a popular choice.
To maintain high efficiency at different output power conditions, the converter operates in nominal synchronous
rectification mode at mid and high output power levels, with transitioning to the diode rectifier mode at light load
and further followed by the burst mode, as the output power becomes even lower. All these transitions are based
on the current sensing on the primary side using the current sense transformer in this specific case.
Figure 48. Major Waveforms of Phase-Shifted Converter
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