Datasheet

R
PR
Lm
XT
L
LK
C
OSS
C
OSS
A
OUTA
OUTB
+
-
C
OSS
C
OSS
B
OUTC
OUTD
C
OSS
C
OSS
OUTE OUTF
C
O
VOUT
- +
L
O
DCR
V
S
UCC28950
www.ti.com SLUSA16B –MARCH 2010–REVISED OCTOBER 2011
Outputs (OUTA, OUTB, OUTC, OUTD, OUTE, OUTF)
• All MOSFET control outputs have 0.2-A drive capability.
• The control outputs are configured as P-MOS and N-MOS totem poles with typical R
DS(on)
20 Ω and 10 Ω
accordingly.
• The control outputs are capable of charging 100-pF capacitor within 12 ns and discharge within 8 ns.
• The amplitude of output control pulses is equal to V
DD
.
• Control outputs are designed to be used with external gate MOSFET/IGBT drivers.
• The design is optimized to prevent the latch up of outputs and verified by extensive tests.
The UCC28950 has outputs OUTA, OUTB driving the active leg, initiating the duty cycle leg of power MOSFETs
in phase-shifted full bridge power stage, and outputs OUTC, OUTD driving the passive leg, completing the duty
cycle leg, as it is shown in typical timing diagram in Figure 48. Outputs OUTE and OUTF are optimized to drive
the synchronous rectifier MOSFETs (Figure 21). These outputs have 200-mA peak-current capabilities and are
designed to drive relatively small capacitive loads like inputs of external MOSFET or IGBT drivers.
Recommended load capacitance should not exceed 100 pF. The amplitude of output signal is equal to V
DD
voltage.
The capacitors C
OSS
shown in Figure 21 are internal MOSFET capacitances that must be taken into account
during design procedure to estimate zero voltage condition and switching losses.
Figure 21. Power Stage
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