Datasheet

OUTA
(OUTC)
OUTB
(OUTD)
T
ABSET1
T
CDSET1
T
ABSET2
T
CDSET2
T
ABSET2
T
CDSET2
T
ABSET1
T
CDSET1
UCC28950
www.ti.com SLUSA16B –MARCH 2010–REVISED OCTOBER 2011
Adaptive Delay, (Delay between OUTA and OUTB, OUTC and OUTD (DELAB, DELCD, ADEL))
The resistor R
AB
from the DELAB pin, DELAB to GND, along with the resistor divider R
AHI
from CS pin to ADEL
pin and R
A
from ADEL pin to GND sets the delay T
ABSET
between one of outputs OUTA or OUTB going low and
another output going high Figure 4.
Figure 4. Delay definitions between OUTA and OUTB, OUTC and OUTD
This delay gradually increases as a function of the CS signal from T
ABSET1
, which is measured at V
CS
= 1.8 V, to
T
ABSET2
, which is measured at the V
CS
= 0.2 V. This approach ensures there will be no shoot-through current
during the high-side and low-side MOSFET switching and optimizes the delay for ZVS condition over a wide load
current range. Depending on the resistor divider R
AHI
and R
A
, the proportional ratio between longest and shortest
delay is set. The max ratio is achieved by tying the CS and ADEL pins together. If ADEL is connected to GND,
then the delay is fixed, defined only by the resistor R
AB
from DELAB to GND. The delay T
CDSET1
and T
CDSET2
settings and their behaviour for outputs OUTC and OUTD are very similar to the one described for OUTA and
OUTB. The difference is that resistor R
CD
connected between DELCD pin and GND sets the delay T
CDSET
.
Delays for outputs OUTC and OUTD share with the outputs OUTA and OUTB the same CS voltage dependence
pin ADEL.
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