Using the UCC2891 Active-Clamp Current-Mode PWM Controller User's Guide Literature Number: SLUU407A June 2010 – Revised May 2013
User's Guide SLUU407A – June 2010 – Revised May 2013 48-V to 3.3-V Forward Converter With Active-Clamp Reset Using the UCC2891 ActiveClamp Current-Mode PWM Controller 1 Introduction The UCC2891EVM-520 evaluation module (EVM) is a forward converter providing a 3.3-V regulated output at 30 A of load current, operating from a 48-V input. The EVM operates over the full 36-V to 75-V telecom-input range, and is able to fully regulate down to zero-load current.
Description www.ti.com 2.1 Applications The UCC2891 is suited for use in isolated telecom 48-V input systems requiring high-efficiency and highpower density for very low-output voltage, high-current converter applications, including: • Server Systems • Datacom • Telecom • DSP's, ASIC's, FPGA's 2.2 Features The UCC2891EVM-520 features include: • ZVS transformer reset using active-clamp technique in forward converter • All surface mount components, double-sided half-brick (2.2 × 2.28 × 0.
UCC2891EVM-520 Electrical Performance Specifications 3 www.ti.com UCC2891EVM-520 Electrical Performance Specifications The UCC2891EVM-520 electrical performance specifications are listed in Table 1. Table 1. UCC2891EVM-520 Performance Summary PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Input Characteristics Input voltage range 36 48 75 V mA No load input current VIN = 36 V, IOUT = 0 A 75 100 Maximum input current VIN = 36 V, IOUT = 30 A 3.00 3.
Schematic www.ti.com 4 Schematic A schematic of the UCC2891EVM-520 is shown in Figure 1. Terminal block J1 is the 48-V input voltagesource connector and J8 is the output and return for the 3.3-V output voltage. On the primary side, U1 is the UCC2891 shown with the necessary discrete circuitry for configuring the controller to operate at 300 kHz with the maximum duty clamp set for 0.65. The EVM is programmed to start at VIN = 36 V, as determined by R11 and R12.
Schematic + + www.ti.com Figure 1. UCC2891EVM-520 Schematic 6 48-V to 3.
EVM Test Setup www.ti.com 5 EVM Test Setup Figure 2 shows the basic test setup recommended to evaluate the UCC2891EVM-520. Oscilloscope + V1 Vin LOAD1 3.3V/30A + A1 V2 + FAN Figure 2. Recommended EVM Test Configuration SLUU407A – June 2010 – Revised May 2013 Submit Documentation Feedback 48-V to 3.
EVM Test Setup 5.1 www.ti.com Output Load (LOAD1) For the output load to VOUT, a programmable electronic load set to constant-current mode and capable of sinking between 0ADC and 30ADC, is used. Using a dc voltmeter, V2, making all output voltage measurements directly at J9 and J10 pins is advised.
Power Up and Power Down Test Procedures www.ti.com 6 Power Up and Power Down Test Procedures The following test procedure is recommended primarily for power up and shut down of the EVM. Whenever the EVM is running above an output load of 15 ADC, the fan must be turned on. Also, never walk away from a powered EVM for extended periods of time. 1.
Power Up/Down Test Procedures 7 www.ti.com Power Up/Down Test Procedures EFFICIENCY vs LOAD CURRENT POWER LOSS vs LOAD CURRENT 100 12 90 10 P LOSS - Power Loss - W 80 60 50 40 30 20 36 V 48 V 75 V 10 8 6 4 36 V 48 V 75 V 2 0 0 0 5 10 25 20 15 30 35 0 5 10 Figure 3. Figure 4.
Power Up/Down Test Procedures www.ti.com POWER LOSS vs LOAD CURRENT 225 100 Phase 180 Gain - bB Gain 60 135 40 90 20 45 0 0 -20 -45 -40 -90 -60 -135 -80 -180 -100 Phase - Degrees 80 t - Time - 2 ! s/div. -225 0.01 0.1 1.0 10 100 f - Frequency - kHz Figure 7. t - Time - 2 Figure 8. 500 mV/div., 1.3 V Peak-to-Peak t - Time - 2 ! s/div. Figure 9. 50 mV/div., 38.8 V Peak-to-Peak SLUU407A – June 2010 – Revised May 2013 Submit Documentation Feedback ! s/div. Figure 10.
Power Up/Down Test Procedures www.ti.com t - Time - 1 ms/div. t - Time - 1 ms/div. Figure 11. VIN = 36 V Figure 12. VIN = 75 V t - Time - 1 ! s/div. t - Time - 400 ms/div. Figure 13. Startup at VIN = 36 V, IOUT = 30 A 12 Figure 14. Transient Testing at VIN = 48 V, IOUT = 10 A 15 A - 10 A 48-V to 3.
EVM Assembly Drawing and Layout www.ti.com 8 EVM Assembly Drawing and Layout Figure 15 through Figure 21 show the top-side and bottom-side component placement for the EVM, as well as device pin numbers where necessary. A four-layer PCB was designed using the top and bottom layers for signal traces and component placement along with an internal ground plane. The PCB dimensions are 3.6 in × 2.
EVM Assembly Drawing and Layout www.ti.com Figure 16. Top-Side Silk Screen Figure 17. Top Signal Trace Layer 14 48-V to 3.
EVM Assembly Drawing and Layout www.ti.com Figure 18. Internal Split Ground Plane Figure 19. Internal Signal Trace Layer SLUU407A – June 2010 – Revised May 2013 Submit Documentation Feedback 48-V to 3.
EVM Assembly Drawing and Layout www.ti.com Figure 20. Bottom Signal Trace Layer Figure 21. Top-Side Silk Screen 16 48-V to 3.
List of Materials www.ti.com 9 List of Materials The following table lists the UCC2891EVM-520 components corresponding to the schematic shown in Figure 1. Table 2. List of Materials (1) (2) (3) (4) COUNT REF DES 3 C1, C2, C4 2 DESCRIPTION PART NUMBER MFR Capacitor, ceramic, 2.2 µF, 100 V, X7R, 20%, 2.
References www.ti.com Table 2. List of Materials (1) (2) (3) (4) (continued) COUNT 10 REF DES DESCRIPTION PART NUMBER MFR 1 L1 Inductor, 2 µH, 1 primary, 1 secondary, 0.920 X 0.780 PA0373 Pulse 1 Q1 MOSFET, P-channel, 150 V, 2.2 A, 240 mΩ, SO8 IRF6216 IR 1 Q2 MOSFET, N-channel, 150 V, 6.7 A, 50 mΩ, PowerPak S08 Si7846DP Vishay 4 Q3, Q4, Q5, Q7 MOSFET, N-channel, 30 V, 60 A, 1.
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