Datasheet
UCC28710, UCC28711
UCC28712, UCC28713
UCC28714, UCC28715
www.ti.com
SLUSB86 –NOVEMBER 2012
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN TYP MAX UNIT
VDD Bias supply operating voltage 9 35 V
C
VDD
VDD bypass capacitor 0.047 1 µF
R
CBC
Cable-compensation resistance 10 kΩ
I
VS
VS pin current −1 mA
T
J
Operating junction temperature −40 125 °C
THERMAL INFORMATION
UCC28710
UCC28711
UCC28712
UCC28713
THERMAL METRIC
(1)
UNITS
UCC28714
UCC28715
D
7 PINS
θ
JA
Junction-to-ambient thermal resistance
(2)
141.5
θ
JCtop
Junction-to-case (top) thermal resistance
(3)
73.8
θ
JB
Junction-to-board thermal resistance
(4)
89.0 °C/W
ψ
JT
Junction-to-top characterization parameter
(5)
23.5
ψ
JB
Junction-to-board characterization parameter
(6)
88.2
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψ
JT
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψ
JB
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
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