Datasheet

UCC28610
SLUS888F –JANUARY 2009–REVISED SEPTEMBER 2012 www.ti.com
ELECTRICAL CHARACTERISTICS
Unless otherwise stated: VDD = 12 V, VGG = 12 V, ZCD = 1 V, I
FB
= 10 µA, GND = 0 V, a 0.1-μF capacitor between VDD
and GND, a 0.1-μF capacitor between VGG and GND, R
CL
= 33.2 kΩ, R
MOT
= 380 kΩ, –40°C < T
A
< +125°C, T
J
= T
A
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
VDD and VGG SUPPLY
VGG
(OPERATING)
VGG voltage, operating VDD = 14 V, I
VGG
= 2.0 mA 13 14 15
VGG
(DISABLED)
VGG voltage, PWM disabled VDD = 12 V, I
VGG
= 15 μA, I
FB
= 350 μA 15 16 17
V
Rise in VGG clamping voltage
ΔVGG VGG
(DISABLED)
– VGG
(OPERATING)
1.75 2.00 2.15
during UVLO, GM, or Fault
VGG = VGG
(DISABLED)
-100 mV, VDD = 12
I
VGG(SREG)
VGG shunt regulator current 6 10 μA
V
ΔVGG
(SREG)
VGG shunt load regulation 10 μA ≤ I
VGG
≤ 5 mA, I
FB
= 350 μA 125 200 mV
VGG
(LREG)
VGG LDO regulation voltage VDD = 20 V, I
VGG
= – 2 mA 13
VGG
(LREG, DO)
VGG LDO Dropout Voltage VDD – VGG, VDD = 11 V, I
VGG
= – 2 mA 1.5 2 2.5
VDD
(ON)
UVLO turn-on threshold 9.7 10.2 10.7 V
VDD
(OFF)
UVLO turn-off threshold 7.55 8 8.5
ΔVDD
(UVLO)
UVLO hysteresis 1.9 2.2 2.5
I
VDD(OPERATING)
Operating current VDD = 20 V 2.5 3 3.7 mA
I
VDD(GM)
Idle current between bursts I
FB
= 350 μA 550 900
μA
I
VDD(UVLO)
Current for VDD < UVLO VDD = VDD
(ON)
– 100 mV, increasing 225 310
VDD Switch on resistance, DRV to
R
DS,ON(VDD)
VGG = 12 V, VDD = 7V, I
DRV
= 50 mA 4 10 Ω
VDD
VDD
(FAULT RESET)
VDD for fault latch reset 5.6 6 6.4 V
MODULATION
Minimum switching period,
t
S(HF)
(1)
I
FB
= 0 μA,
(1)
7.125 7.5 7.875
frequency modulation (FM) mode
μs
Maximum switching period,
t
S(LF)
(1)
reached at end of FM modulation I
FB
= I
FB, CNR3
– 20 μA,
(1)
31 34 38
range
I
FB
= 0 μA, R
CL
= 33. 2 kΩ 2.85 3 3.15
Maximum peak driver current over
I
DRVpk(max)
amplitude modulation(AM) range
I
FB
= 0 μA, R
CL
= 100 kΩ 0.80 0.90 1.0
A
Minimum peak driver current I
FB, CNR2
+ 10 μA, R
CL
= 33.2 kΩ 0.7 0.85 1.1
I
DRVpk(min)
reached at end of AM modulation
I
FB, CNR2
+ 10 μA, R
CL
= 100 kΩ 0.2 0.33 0.5
range
K
P
Maximum power constant I
DRVpk(max)
= 3 A 0.54 0.60 0.66 W/μH
Minimum peak driver independent
I
DRVpk(absmin)
R
CL
= OPEN 0.3 0.45 0.6 A
of R
CL
or AM control
Leading edge current limit blanking I
FB
= 0 μA, R
CL
= 100 kΩ, 1.2-A pull-up on
t
BLANK(Ilim)
120 220 450 ns
time DRV
I
FB
= 0 μA 2.94 3 3.06
V
CL
Voltage of CL pin V
I
FB
= (I
FB,CNR3
– 20 μA)
(1)
0.95 1.00 1.10
I
FB
increasing, t
S
= t
S(LF)
,
I
FB,CNR1
(2)
I
FB
range for FM modulation 145 165 195
I
DRVpk
= I
DRVpk(max)
I
FB,CNR2
– I
FB,CNR1
t
S
= t
S(LF)
, I
DRVpk
ranges from
I
FB
range for AM modulation 35 45 65
(2)
I
DRVpk(max)
to I
DRVpk(min)
μA
I
FB,CNR3
– I
FB,CNR2
I
FB
range for Green Mode (GM) I
FB
increasing until PWM action is disabled
45 70 90
(2)
modulation entering a burst-off state
I
FB
hysteresis during GM
I
FB, GM-HYST
(2)
modulation to enter burst on and I
FB
decreasing from above I
FB,CNR3
10 25 40
off states
V
FB
Voltage of FB pin I
FB
= 10 μA 0.34 0.7 0.84 V
(1) t
S
sets a minimum switching period. Following the starting edge of a PWM on time, under normal conditions, the next on time is initiated
following the first zero crossing at ZCD after t
S
. The value of t
S
is modulated by I
FB
between a minimum of t
S(HF)
and a maximum of
t
S(LF)
In normal operation, t
S(HF)
sets the maximum operating frequency of the power supply and t
S(LF)
sets the minimum operating
frequency of the power supply.
(2) Refer to Figure 2.
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