Datasheet

   
   
SLUS419C − AUGUST 1999 − REVISED NOVEMBER 2001
24
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TYPICAL APPLICATION
Figure 13 shows the circuitry for the voltage feedback loop. D13 is a TL431 shunt regulator that functions as
an operational amplifier, providing feedback control.
V
C
= V
ERR
G
CO(s)
UDG−01091
R13
PGND2
R27
Q5
D14
R36
R16
D13
R31
H11AV1
3
2
1
4
5
6
U3
SGND
V
REF
V
BOOST
V
OUT
C14
R35
C15
G
CO
(s)
Figure 13. UCC38500 Feedback Loop
Initially the designer must select the resistor values for the divider gain H(s). Equation (42) is used to determine
resistor size. Selecting R27 to be a standard value of 10-kΩ requires R31 to be approximately 38.3 kΩ.
R31 +
R27
ǒ
V
OUT
* V
REF
Ǔ
V
REF
It is important to correctly bias the TL431 and the optoisolator for proper operation. Zener diode D14 and a
depletion mode J-FET, Q5, supply the bias voltage for the TL431. Resistors R16 and R13 provide the minimum
bias currents for the TL431 and the optoisolator respectively and can be calculated with the following equations.
Where I
OP(min)
is the minimum optoisolation current, and V
VERR(max)
is the maximum voltage seen at the VERR
pin of the UCC38500. VERR has an internal clamp that limits this pin to 4.5 V. V
F
is the typical forward voltage
of the diode in the opto isolator, and I
TL431(min)
is the minimum cathode current of the TL431. For the
components used in this design example R13 is calculated to be approximately 2.0 kΩ and R16 was calculated
to be approximately 680 Ω. The optoisolator is configured to have dc gain of approximately 20 dB and the
optoisolator −3 dB point is approximately 8 kHz. Figure 14 shows the frequency response of the optoisolator.
(42)