Datasheet

   
   
SLUS419C − AUGUST 1999 − REVISED NOVEMBER 2001
19
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TYPICAL APPLICATION
R
I
+
−
R
f
C
P
CAOUT
C
Z
Figure 10. Current Loop Compensation
voltage loop
The second major source of harmonic distortion is the ripple on the output capacitor at the second harmonic
of the line frequency. This ripple is fed back through the error amplifier and appears as a 3rd harmonic ripple
at the input to the multiplier. The voltage loop must be compensated not just for stability but also to attenuate
the contribution of this ripple to the total harmonic distortion of the system (refer to Figure 11).
R
IN
R
D
+
−
R
f
C
f
V
REF
V
OUT
C
Z
Figure 11. Voltage Amplifier Configuration
The gain of the voltage amplifier, G
VA
, can be determined by first calculating the amount of peak ripple present
on the output capacitor V
OPK.
The peak value of the second harmonic voltage is given by equation (23), where
f
R
is the frequency of the rectified line voltage. For this design f
R
is equal to 120 Hz.
V
OPK
+
P
IN
ǒ
2 p f
R
C
BOOST
V
BOOST
Ǔ
(23)