Datasheet
short-circuit timing
V
OUT
+ I
PEAK
R
L
(2)
t
ON
+ CT
(
mF
)
1 V
40 mA
seconds
(3)
t
OFF
+ CT
(
mF
)
1 V
1 mA
seconds
(4)
capacitive loads
C
OUT(max)
+
ƪ
I
PEAK
(A) * I
LOAD
(A)
ƫ
t
ON
(sec)
V
OUT
(V)
Farads
(5)
C
OUT(max)
+
t
ON
(sec)
R
LOAD
(W) ȏn
ȧ
ȧ
ȧ
ȧ
ȡ
Ȣ
1
1*
ǒ
V
OUT
(V)
I
MAX
(A) R
LOAD
(W)
Ǔ
ȧ
ȧ
ȧ
ȧ
ȣ
Ȥ
Farads
(6)
UCC284-EP
SLVS862A – NOVEMBER 2008 – REVISED NOVEMBER 2008 .......................................................................................................................................
www.ti.com
During normal operation the output voltage is in regulation and the SD/CT pin is held to -1.5 V via a 50-k Ω
internal-source impedance. If the output-current rises above the overcurrent threshold, the CT capacitor is
charged by a 40- µ A current sink. The voltage on the SD/CT pin moves in a negative direction with respect to
GND.
During an overcurrent condition, the regulator actively limits the maximum output current to the peak-current limit.
This limits the output voltage of the regulator to:
If the output current stays above the overcurrent threshold, the voltage on the SD/CT pin reaches – 2.6 V with
respect to GND and the output turns off. The CT capacitor is then discharged by a 1- µ A current source. When
the voltage on the SD/CT pin reaches – 1.6 V with respect to GND, the output turns back on. This process
repeats until the output current falls below the overcurrent threshold.
tON, the time the output is on during an overcurrent condition is determined by the following equation:
tOFF, the time the output is off during an overcurrent condition is determined by the following equation:
A capacitive load on the regulator's output appears as a short-circuit during start-up. If the capacitance is too
large, the output voltage does not begin to regulate during the initial t
ON
period and the UCC284 enters a pulsed
mode operation. For a constant current load the maximum allowed output capacitance is calculated as follows:
For worst case calculations, the minimum value for t
ON
should be used, which is based on the value of CT
capacitor selected. For a resistive load the maximum output capacitor can be estimated as follows:
Figure 6 and Figure 7 are oscilloscope photos of the UCC284-ADJ operating during an overcurrent condition.
Figure 6 shows operation of the circuit as the output current initially rises above the overcurrent threshold. This is
shown on a 1 ms/div. scale. Figure 7 shows operation of the same circuit on a 25 ms/div. scale showing one
complete cycle of operation during an overcurrent condition.
10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): UCC284-EP