Datasheet

20
5
+
4.1V/4.3V
VDD
18
VREF
EN
LDO
Enable detection
Level&pulse
Over
temperature
Vref ready
OTP
UVLO
Vref OK
Enable
EN_INT
17
ILIM
+
0.5V
Cycle by cycle
current limit
& duty cycle match
OCP delay
timer
19
OVP/OTP
+
0.7V
11uA
OVP
10
HICC
Hiccup
timer
Switching Logic
OCP
OUTA
OUTB SRA SRB
9
16
RAMP/CS
3
2
1
13
COMP
FB/EA-
REF/EA+
SS
15
RT
12
SP
11
PS
Oscillator
Deadtime
+
+
+
+
14
OP
gm
CLK
BLANK
+
+
SR_RAMP
SR_RAMP
generator
8 7 6
VSENSE
4
GND
70ns
leading edge blanking
BLANK
550mV
UCC28250
SLUSA29C –APRIL 2010– REVISED JULY 2011 www.ti.com
DEVICE INFORMATION
Functional Block Diagram
NOTE
Pin numbers are used for RGP package. PW package has different pin numbers.
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Product Folder Link(s): UCC28250