Datasheet
SS
SS
COMP_ final
27 A T
C
V
m ´
=
VSENSE
VREF
COMP
FB/EA-
REF/EA+
SS
UCC28250
+
+
C
SS
C
Z2
R
Z2
C
P1
+
C
Z3
R
Z3
R
O2
R
O1
VOUT
External
Reference
UCC28250
www.ti.com
SLUSA29C –APRIL 2010– REVISED JULY 2011
For primary-side control, the internal error amplifier is connected as a buffer stage. In other words, the COMP pin
is shorted to the FB/EA- pin, and the output of an external error amplifier is connected to the REF/EA+ pin
through an optical coupler (Figure 14). In this case, the output start-up is an open loop soft start because the
COMP follows the soft-start voltage instead of the voltage loop output. The soft-start time is still determined by
external capacitor C
SS
and the 27-µA internal charge current. The voltage depends on the value of final COMP
voltage which corresponds to the regulated primary output duty cycle. According to the desired soft start time and
COMP pin voltage level at steady state, the SS pin capacitor can be calculated as:
(10)
After soft start, the voltage at SS pin is eventually clamped at around 4 V. Under fault conditions (UVLO, internal
thermal shut down, OVP/OTP, hiccup mode), or when externally disabled, SS pin is pulled down to ground
quickly by an internal switch with 2 kΩ on resistance to prepare for re-start. Pulling SS pin to ground externally
shuts down the controller as well.
Figure 14. Error Amplifier EAMP Connections for primary-side Control
Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): UCC28250