Datasheet

 
SLUS544E − SEPTEMBER 2003 − REVISED MARCH 2009
4
www.ti.com
ELECTRICAL CHARACTERISTICS:
V
DD
= 12 V, 0.1-µF capacitor from VDD to GND, 0.1-µF capacitor from REF to GND, F
OSC
= 1 MHz, T
A
= −40°C to
105°C, T
A
= T
J
, (unless otherwise noted).
PARAMETER
TEST CONDITION
MIN TYP MAX UNITS
Reference
Output voltage 8 V < VDD < 14 V, ILOAD=0 mA to −10 mA 3.15 3.3 3.45 V
Output current Outputs not switching; CNTRL = 0 V 10 mA
Ouput short circuit current V
REF
= 0 V −40 −20 −10 mA
V
REF
UVLO 2.55 3 3.25 V
Soft-Start
SS charge current RCHG=10.2 kΩ, SS = 0 V −70 −100 −130
A
SS discharge current RCHG=10.2 kΩ, SS = 2 V 70 100 130
µA
SS initial voltage LINEOV=2 V, LINEUV = 0 V 0.5 1 1.5
V
SS voltage at 0% dc Point at which output starts switching 0.5 1.2 1.8
V
SS voltage ratio 75% 90% 100%
SS Max voltage LINEOV = 0 V, LINEUV = 2 V 3 3.5 4 V
Oscillator and PWM
Output frequency RCHG = 10.2 kΩ, RDISCHG = 10.2 kΩ 450 500 550
kHz
Oscillator frequency RCHG = 10.2 kΩ, RDISCHG = 10.2 kΩ 900 1000 1100
kHz
Output maximum duty cycle
RCHG = 10.2 kΩ, RDISCHG = 10.2 kΩ, measured at OUT1
and OUT2
73% 75% 77% %
CHG voltage 2 2.5 3
V
DISCHG voltage 2 2.5 3
V
Slope Compensation
Slope
RSLOPE = 75 kΩ, RCH = 66 kΩ, RDISCHG = 44 kΩ, Csx =
0 V to 0.5 V
140 200 260 mV/us
Channel matching RSLOPE = 75 kΩ, Csx = 0 V 0% 10%
Current Sense
CS1, CS2 bias current CS1 = 0, CS2 = 0 −500 0 500 nA
Prop delay CSx to OUTx CSx input 0 V to 1.5 V step 40 85 ns
CS1, CS2 sink current CSx = 2 V 2.3 4.5 7 mA
CNTRL Section
Resistor ratio
(1)
0.6
Ctrl input current CTRL = 0 V and 3.3 V −100 0 100 nA
Ctrl voltage at 0% dc
CSx = 0 V, Point at which output starts switching (checks
resistor ratio)
0.5 1.2 1.8 V
NOTES: (1). Ensured by design. Not 100% tested in production.