Datasheet

7
UCC1809-1/-2
UCC2809-1/-2
UCC3809-1/-2
3
4
UCC3809
OS C ILLATOR
RT2
CT
RT1
1k
2N2222A
424
SYNC
PULSE
OP TION I
3
4
UCC3809
OS C ILLATOR
RT2
CT
RT1
424
SYNC
PULSE
0.1µF
2N2222A
24
+5 V
OP TION II
Figure 5. UCC3809 synchronization options.
UDG-99006
Synchronization
Both of the synchronization schemes shown in Figure 5
can be successfully implemented with the internal oscilla
-
tor of the UCC3809. Both schemes allow access to the
timing ramp needed for slope compensation and have
minimal impact on the programmed maximum duty cycle.
In the absence of a sync pulse, the PWM controller will
run independently at the frequency set by RT1, RT2, and
CT. This free running frequency must be approximately
15 to 20% lower than the sync pulse frequency to insure
the free running oscillator does not cross the comparator
threshold before the desired sync pulse.
Option I uses the synchronization pulse to pull pin 3 low,
triggering the internal 1.67V comparator to reset the RS
latch and initiate a charging cycle. The valley voltage of
the CT waveform is higher when synchronized using this
configuration, decreasing the ramp charge and discharge
times, thereby increasing the operating frequency; other-
wise the overall shape of the CT voltage waveform is un-
changed.
Option II uses the synchronization pulse to superimpose
the sync voltage onto the peak of the CT waveform. This
triggers the internal 3.33V comparator, initiating a dis
-
charge cycle. The sync pulse is summed with the free
running oscillator waveform at the CT node, resulting in a
spike on top of the CT peak voltage.
ADDITIONAL INFORMATION
Please refer to the following Unitrode application topics
for additional information.
[1] Application Note U-165, Design Review: Isolated 50W
Flyback Converter with the UCC3809 Primary Side Con
-
troller by Lisa Dinwoodie.
[2] Design Note DN-89, Comparing the UC3842,
UCC3802, and UCC3809 Primary Side PWM Controllers
by Lisa Dinwoodie.
APPLICATION INFORMATION (cont.)