Datasheet

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SLUS456D − APRIL 1999 - REVISED AUGUST 2002
3
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electrical characteristics, T
A
= 0°C to 70°C for the UCC3808A-x, −40°C to 85°C for the UCC2808A-x,
VDD = 10 V (see Note 6), 1-µF capacitor from VDD to GND, R = 22 kΩ, C = 330 pF T
A
= T
J
, (unless
otherwise noted)
Error Amplifier Section
Input voltage COMP = 2 V 1.95 2 2.05 V
Input bias current –1 1 µA
Open loop voltage gain 60 80 dB
COMP sink current FB = 2.2 V, COMP = 1 V 0.3 2.5 mA
COMP source current FB = 1.3 V, COMP = 3.5 V –0.2 –0.5 mA
PWM Section
Maximum duty cycle Measured at OUTA or OUTB 48 49 50 %
Minimum duty cycle COMP = 0 V 0 %
Current Sense Section
Gain See Note 2 1.9 2.2 2.5 V/V
Maximum input signal COMP = 5 V See Note 3 0.45 0.5 0.55 V
CS to output delay COMP = 3.5 V, CS from 0 mV to 600 mV 100 200 ns
CS source current −200 nA
CS sink current CS = 0.5 V, RC = 5.5 V See Note 7 5 10 mA
Over current threshold 0.7 0.75 0.8 V
COMP to CS offset CS = 0 V 0.35 0.8 1.2 V
Output Section
OUT low level I = 100 mA 0.5 1 V
OUT high level I = −50 mA, VDD – OUT 0.5 1 V
Rise time C
L
= 1 nF 25 60 ns
Fall time C
L
= 1 nF 25 60 ns
Undervoltage Lockout Section
Start threshold
UCCx808A−1 See Note 6 11.5 12.5 13.5 V
Start threshold
UCCx808A−2 4.1 4.3 4.5 V
Minimum operating voltage after start
UCCx808A−1 7.6 8.3 9 V
Minimum operating voltage after start
UCCx808A−2 3.9 4.1 4.3 V
Hysteresis
UCCx808A−1 3.5 4.2 5.1 V
Hysteresis
UCCx808A−2 0.1 0.2 0.3 V
Soft Start Section
COMP rise time FB = 1.8 V, Rise from 0.5 V to 4 V 3.5 20 ms
Overall Section
Startup current VDD < start threshold 130 260 µA
Operating supply current FB = 0 V, CS = 0 V See Note 5 and 6 1 2 mA
VDD zener shunt voltage IDD = 10 mA See Note 4 13 14 15 V
NOTES: 2. Gain is defined by: A +
DV
COMP
DV
CS
, 0 ≤ V
CS
≤ 0.4 V.
3. Parameter measured at trip point of latch with FB at 0 V.
4. Start threshold and zener shunt threshold track one another.
5. Does not include current in the external oscillator network.
6. For UCCx808A−1, set VDD above the start threshold before setting at 10 V.
7. The internal current sink on the CS pin is designed to discharge an external filter capacitor. It is not intended to be a dc sink path.