Datasheet
UCC28089
SLUS623A -- SEPTEMBER 2004 -- REVISED AUGUST 2006
9
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APPLICATION INFORMATION
Program the oscillator frequency of the UCC28089 to equal the desired switching frequency of the output post
regulator. The secondary-side controller may also need corresponding switching frequency programming, such
as RAMP and G2C capacitor values for the UCC2540. Program the dead time to be approximately 1/4 of the
resonant period of the equivalent parasitic L--C circuit that is established by the primary leakage inductance of
the transformer and the total drain-source capacitance of the primary-side power MOSFET transistors (C
OSS
+ stray capacitances). Remember that C
OSS
predictably varies over input line voltage. If the variation is too great
and/or 1/4 the resonant period is less than 100 ns, connect additional capacitance (C
R1
and C
R2
in Figure 2)
between the drain and source of the primary transistors, which stabilizes the capacitance and raise the total
capacitance value.
If the secondary-side controller is compatible with pulse edges, the pulse edge transformer circuit in Figure 3
can provide an isolated pulse edge signal on the secondary side using a transformer core that is 6-mm diameter
or less. The recommended transformer (COEV #MGBBT--0001101) is compatible with all s witching frequencies
and it is smaller than many opto-isolators.
UCC28089
R1
634
C1
680 pF
1
5GND
GND1
Primary Ground Secondary Ground
UCC2540
SYNCIN
REFSYNC
4
2
Q
CL
2N3904
T1
1:1
R
CB
422
R
BE
115
L1
15uH
Figure 3. Isolation and clamping the SYNC signal for Cascaded Buck Converters
Notice that the peak-pulse voltage is proportional to the UCC28089 bias voltage. The circuit in Figure 3 is well
suited to the full VDD bias voltage range of the UCC28089 bias voltage because it has a clamp circuit. The clamp
circuit in Figure 3 (R
CB
,R
BE
and Q
CL
)isaV
BE
clamp rather than a Zener diode. A V
BE
clamp is used here
because it has much lower capacitance than typical Zener diodes so that the clamp does not affect the narrow
50-ns pulse width. The clamp may be replaced by a single resistor in applications, as in Figure 2, where the VDD
bias voltage of the UCC28089 is regulated within a +/--5% window.