Datasheet

UCC28089
SLUS623A -- SEPTEMBER 2004 -- REVISED AUGUST 2006
5
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FUNCTIONAL BLOCK DIAGRAM
OUTPUT LOGIC
UCC28089
6
OUTB
7
OUTA
8
VDD
4
CS
2
DIS
1
SYNC
3
CT
5
GND
VDD
UVLO
VDD = 10.5/8.0 V
VDD
OVER
CURRENT
COMP
SS LATCH
0.725 V
SS
COMP
Q
Q
S
R
+
0.2V
56 STEP
START
DELAY
R
GO
7STEPSOFT--
START RAMP
REFGO
VDD/5
SQ
QR
CK
VDD/5
VDD/19.6
Q
T_
Q
SOFT--START & FAULT
OSCILLATOR
UDG-04101
PIN # NAME I/O FUNCTION
1 SYNC O
Active when OUTA and OUTB are active, logic LO at all other times such as during under-voltage
lock-out and over-current shutdown. When active, SYNC is logic HI (VDD) during the discharge time
of the oscillator and logic LO (GND) at all other times. The pulse occur during the dead time.
2 DIS I
Separate oscillator timing capacitor discharge pin that allows the dead time to be externally
programmed.
3 CT I Oscillator timing capacitor connection.
4 CS I
Current sense pin. An over current shutdown event is triggered when the voltage of this pin rises
above 0.75 V.
5 GND --
Ground pin. Analog and digital signals reference this pin and output drivers return current through
this pin
6 OUTB O Driver output, capable of sinking 1 A and sourcing 0.5 A. OUTB signal alternates with OUTA.
7 OUTA O Driver output, capable of sinking 1 A and sourcing 0.5 A. OUTA signal alternates with OUTB.
8 VDD I Power input connection for this device.