Datasheet

UCC28089
SLUS623A -- SEPTEMBER 2004 -- REVISED AUGUST 2006
10
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APPLICATION INFORMATION
Synchronization of Multiple UCC28089 Controllers to an External Signal
In systems where multiple UCC28089 parts need to be synchronized to a common clock, a 3.3-V logic-level
signal can be directly applied to the CT pin (the SYNC pin on UCC28089 only provides output sync signals).
As shown in Figure 4, the externally supplied sync pulse width determines the frequency and the dead time
between OUT A and OUT B. In this configuration, the discharge pin DIS should be grounded since it is not used.
The external sync signal should exceed the oscillator trip level of V
DD
/5 when high, and pull C T below V
DD
/20
when low.
UDG-04113
3.3V
OUT A
OUT B
Ext. Sync
DIS
SYNC
CT
CS
GND
OUTB
OUTA
VDD
UCC28089
1
2
3
4 5
6
7
8
Ext. Sync
AppliedtoCT
U1
External Sync pulse width defines
output dead time
NC
1 μF
VDD
Figure 4. Synchronizing the UCC28089 to an External Signal